[gcc(refs/users/aoliva/heads/testme)] [testsuite] [ia32] adjust testcases to cope with default-to-PIE

[Alexandre Oliva]

https://gcc.gnu.org/g:d489fe0bc19a0e9e05caa9f554b42364e7dc80ad

commit d489fe0bc19a0e9e05caa9f554b42364e7dc80ad
Author: Alexandre Oliva <oliva@adacore.com>
Date:   Wed Dec 10 03:36:42 2025 -0300

    [testsuite] [ia32] adjust testcases to cope with default-to-PIE
    
    A few testcases new in gcc-15 fail on i686-linux-gnu with PIE enabled
    by default.  Add -fno-PIE so that they find the code they test for.
    
    
    for  gcc/testsuite/ChangeLog
    
            * gcc.dg/sibcall-12.c: Add -fno-PIE on ia32.
            * gcc.target/i386/pr106060-2.c: Likewise.
            * gcc.target/i386/pr106060-3.c: Likewise.
            * gcc.target/i386/vect-shiftv4qi.c: Likewise.

Diff:
---
 gcc/testsuite/gcc.dg/sibcall-12.c              | 1 +
 gcc/testsuite/gcc.target/i386/pr106060-2.c     | 1 +
 gcc/testsuite/gcc.target/i386/pr106060-3.c     | 1 +
 gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c | 1 +
 4 files changed, 4 insertions(+)

diff --git a/gcc/testsuite/gcc.dg/sibcall-12.c b/gcc/testsuite/gcc.dg/sibcall-12.c
index 5773c9c1c4a5..7e13c20878cd 100644
--- a/gcc/testsuite/gcc.dg/sibcall-12.c
+++ b/gcc/testsuite/gcc.dg/sibcall-12.c
@@ -1,5 +1,6 @@
 // Test for sibcall optimization with struct aligned on stack.
 // { dg-options "-O2" }
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 // { dg-final { scan-assembler "jmp" { target i?86-*-* x86_64-*-* } } }
 
 struct A { char a[17]; };
diff --git a/gcc/testsuite/gcc.target/i386/pr106060-2.c b/gcc/testsuite/gcc.target/i386/pr106060-2.c
index 23933aba978c..6fe4b71888f5 100644
--- a/gcc/testsuite/gcc.target/i386/pr106060-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr106060-2.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=x86-64-v3" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 #include <immintrin.h>
 
 __m256i
diff --git a/gcc/testsuite/gcc.target/i386/pr106060-3.c b/gcc/testsuite/gcc.target/i386/pr106060-3.c
index 59c128cf923c..ac53b0bd9f56 100644
--- a/gcc/testsuite/gcc.target/i386/pr106060-3.c
+++ b/gcc/testsuite/gcc.target/i386/pr106060-3.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=x86-64-v3" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 #include <immintrin.h>
 
 __m256i
diff --git a/gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c b/gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c
index 9b52582d01f8..a5b8ffebc242 100644
--- a/gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c
+++ b/gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -msse2 -mno-avx2 -mno-avx512vl" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 #define N 4