[gcc r16-5891] aarch64: Fix crc{, _rev}<SWI124:mode>si4 expanders [PR122991]
Jakub Jelinek
jakub@gcc.gnu.org
Thu Dec 4 19:37:40 GMT 2025
https://gcc.gnu.org/g:8d36603b8501b33525ebf583f0bb6ca489fee000
commit r16-5891-g8d36603b8501b33525ebf583f0bb6ca489fee000
Author: Jakub Jelinek <jakub@redhat.com>
Date: Thu Dec 4 20:37:00 2025 +0100
aarch64: Fix crc{,_rev}<SWI124:mode>si4 expanders [PR122991]
The newly added gcc.dg/pr122991.c test fails also on aarch64.
The problem is the same as on x86 which has been fixed in r16-5882,
while the last operand is guaranteed to be a CONST_INT of the right
mode initially, maybe_legitimize_operands can change that if some earlier
operand has the same value and e.g. register_operand predicate has been
used, that operand is forced into a pseudo and maybe_legitimize_operands
then checks if that satisfies the predicate of the other operand.
As on x86 and aarch64 it didn't have any predicate, it happily used
a pseudo in those cases instead of the expected CONST_INT.
The following patch fixes that.
2025-12-04 Jakub Jelinek <jakub@redhat.com>
PR target/122991
* config/aarch64/aarch64.md (crc_rev<ALLI:mode><ALLX:mode>4,
crc<ALLI:mode><ALLX:mode>4): Use const_int_operand predicate for
the last operand.
Diff:
---
gcc/config/aarch64/aarch64.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index fde4fabb7ef4..8beeefca65ee 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -4917,7 +4917,7 @@
;; data
(match_operand:ALLI 2 "register_operand" "r")
;; polynomial without leading 1
- (match_operand:ALLX 3)]
+ (match_operand:ALLX 3 "const_int_operand")]
""
{
/* If the polynomial is the same as the polynomial of crc32c* instruction,
@@ -4956,7 +4956,7 @@
;; data
(match_operand:ALLI 2 "register_operand" "r")
;; polynomial without leading 1
- (match_operand:ALLX 3)]
+ (match_operand:ALLX 3 "const_int_operand")]
"TARGET_AES && <ALLI:sizen> <= <ALLX:sizen>"
{
aarch64_expand_crc_using_pmull (<ALLX:MODE>mode, <ALLI:MODE>mode,
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