[gcc r15-4170] RISC-V: Add testcases for form 4 of scalar signed SAT_SUB
Pan Li
panli@gcc.gnu.org
Tue Oct 8 11:07:03 GMT 2024
https://gcc.gnu.org/g:9252fc398c86ec0eac2c56283e2ded8ea6cfb70c
commit r15-4170-g9252fc398c86ec0eac2c56283e2ded8ea6cfb70c
Author: Pan Li <pan2.li@intel.com>
Date: Thu Oct 3 16:47:52 2024 +0800
RISC-V: Add testcases for form 4 of scalar signed SAT_SUB
Form 4:
#define DEF_SAT_S_SUB_FMT_4(T, UT, MIN, MAX) \
T __attribute__((noinline)) \
sat_s_sub_##T##_fmt_4 (T x, T y) \
{ \
T minus; \
bool overflow = __builtin_sub_overflow (x, y, &minus); \
return !overflow ? minus : x < 0 ? MIN : MAX; \
}
The below test are passed for this patch.
* The rv64gcv fully regression test.
It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat_s_sub-4-i16.c: New test.
* gcc.target/riscv/sat_s_sub-4-i32.c: New test.
* gcc.target/riscv/sat_s_sub-4-i64.c: New test.
* gcc.target/riscv/sat_s_sub-4-i8.c: New test.
* gcc.target/riscv/sat_s_sub-run-4-i16.c: New test.
* gcc.target/riscv/sat_s_sub-run-4-i32.c: New test.
* gcc.target/riscv/sat_s_sub-run-4-i64.c: New test.
* gcc.target/riscv/sat_s_sub-run-4-i8.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
Diff:
---
gcc/testsuite/gcc.target/riscv/sat_arith.h | 14 ++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i16.c | 30 ++++++++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i32.c | 28 ++++++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i64.c | 27 +++++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i8.c | 28 ++++++++++++++++++++
.../gcc.target/riscv/sat_s_sub-run-4-i16.c | 16 ++++++++++++
.../gcc.target/riscv/sat_s_sub-run-4-i32.c | 16 ++++++++++++
.../gcc.target/riscv/sat_s_sub-run-4-i64.c | 16 ++++++++++++
.../gcc.target/riscv/sat_s_sub-run-4-i8.c | 16 ++++++++++++
9 files changed, 191 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat_arith.h
index fd3879d31c5b..7c3859cc1834 100644
--- a/gcc/testsuite/gcc.target/riscv/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat_arith.h
@@ -390,6 +390,17 @@ sat_s_sub_##T##_fmt_3 (T x, T y) \
#define DEF_SAT_S_SUB_FMT_3_WRAP(T, UT, MIN, MAX) \
DEF_SAT_S_SUB_FMT_3(T, UT, MIN, MAX)
+#define DEF_SAT_S_SUB_FMT_4(T, UT, MIN, MAX) \
+T __attribute__((noinline)) \
+sat_s_sub_##T##_fmt_4 (T x, T y) \
+{ \
+ T minus; \
+ bool overflow = __builtin_sub_overflow (x, y, &minus); \
+ return !overflow ? minus : x < 0 ? MIN : MAX; \
+}
+#define DEF_SAT_S_SUB_FMT_4_WRAP(T, UT, MIN, MAX) \
+ DEF_SAT_S_SUB_FMT_4(T, UT, MIN, MAX)
+
#define RUN_SAT_S_SUB_FMT_1(T, x, y) sat_s_sub_##T##_fmt_1(x, y)
#define RUN_SAT_S_SUB_FMT_1_WRAP(T, x, y) RUN_SAT_S_SUB_FMT_1(T, x, y)
@@ -399,6 +410,9 @@ sat_s_sub_##T##_fmt_3 (T x, T y) \
#define RUN_SAT_S_SUB_FMT_3(T, x, y) sat_s_sub_##T##_fmt_3(x, y)
#define RUN_SAT_S_SUB_FMT_3_WRAP(T, x, y) RUN_SAT_S_SUB_FMT_3(T, x, y)
+#define RUN_SAT_S_SUB_FMT_4(T, x, y) sat_s_sub_##T##_fmt_4(x, y)
+#define RUN_SAT_S_SUB_FMT_4_WRAP(T, x, y) RUN_SAT_S_SUB_FMT_4(T, x, y)
+
/******************************************************************************/
/* Saturation Truncate (unsigned and signed) */
/******************************************************************************/
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i16.c
new file mode 100644
index 000000000000..60c22e25eb89
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i16.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_sub_int16_t_fmt_4:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** li\s+[atx][0-9]+,\s*32768
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*16
+** sraiw\s+a0,\s*a0,\s*16
+** ret
+*/
+DEF_SAT_S_SUB_FMT_4(int16_t, uint16_t, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i32.c
new file mode 100644
index 000000000000..da68c9d264d7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i32.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_sub_int32_t_fmt_4:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** li\s+[atx][0-9]+,\s*-2147483648
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7]
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** sext\.w\s+a0,\s*[atx][0-9]+
+** ret
+*/
+DEF_SAT_S_SUB_FMT_4(int32_t, uint32_t, INT32_MIN, INT32_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i64.c
new file mode 100644
index 000000000000..578abea05d16
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i64.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_sub_int64_t_fmt_4:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** li\s+[atx][0-9]+,\s*-1
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** ret
+*/
+DEF_SAT_S_SUB_FMT_4(int64_t, uint64_t, INT64_MIN, INT64_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i8.c
new file mode 100644
index 000000000000..443d7dc91c8d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_sub-4-i8.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_sub_int8_t_fmt_4:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*a1
+** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
+** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
+** neg\s+[atx][0-9]+,\s*[atx][0-9]+
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slliw\s+a0,\s*a0,\s*24
+** sraiw\s+a0,\s*a0,\s*24
+** ret
+*/
+DEF_SAT_S_SUB_FMT_4(int8_t, uint8_t, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i16.c
new file mode 100644
index 000000000000..c7056ed27e58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i16.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int16_t
+#define T2 uint16_t
+
+DEF_SAT_S_SUB_FMT_4_WRAP(T1, T2, INT16_MIN, INT16_MAX)
+
+#define DATA TEST_BINARY_DATA_WRAP(T1, sssub)
+#define T TEST_BINARY_STRUCT_DECL(T1, sssub)
+#define RUN_BINARY(x, y) RUN_SAT_S_SUB_FMT_4_WRAP(T1, x, y)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i32.c
new file mode 100644
index 000000000000..7168f948cb6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int32_t
+#define T2 uint32_t
+
+DEF_SAT_S_SUB_FMT_4_WRAP(T1, T2, INT32_MIN, INT32_MAX)
+
+#define DATA TEST_BINARY_DATA_WRAP(T1, sssub)
+#define T TEST_BINARY_STRUCT_DECL(T1, sssub)
+#define RUN_BINARY(x, y) RUN_SAT_S_SUB_FMT_4_WRAP(T1, x, y)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i64.c
new file mode 100644
index 000000000000..29b2b54ec26b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int64_t
+#define T2 uint64_t
+
+DEF_SAT_S_SUB_FMT_4_WRAP(T1, T2, INT64_MIN, INT64_MAX)
+
+#define DATA TEST_BINARY_DATA_WRAP(T1, sssub)
+#define T TEST_BINARY_STRUCT_DECL(T1, sssub)
+#define RUN_BINARY(x, y) RUN_SAT_S_SUB_FMT_4_WRAP(T1, x, y)
+
+#include "scalar_sat_binary_run_xxx.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i8.c
new file mode 100644
index 000000000000..65027b7a3066
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_s_sub-run-4-i8.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+#include "sat_arith_data.h"
+
+#define T1 int8_t
+#define T2 uint8_t
+
+DEF_SAT_S_SUB_FMT_4_WRAP(T1, T2, INT8_MIN, INT8_MAX)
+
+#define DATA TEST_BINARY_DATA_WRAP(T1, sssub)
+#define T TEST_BINARY_STRUCT_DECL(T1, sssub)
+#define RUN_BINARY(x, y) RUN_SAT_S_SUB_FMT_4_WRAP(T1, x, y)
+
+#include "scalar_sat_binary_run_xxx.h"
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