[gcc r14-9672] aarch64: Fix SCHEDULER_IDENT for Cortex-A510 and Cortex-A520

[Richard Ball]

https://gcc.gnu.org/g:cab53aae43cf94171b01320c08302e47a5daa391

commit r14-9672-gcab53aae43cf94171b01320c08302e47a5daa391
Author: Richard Ball <richard.ball@arm.com>
Date:   Tue Mar 26 13:54:31 2024 +0000

    aarch64: Fix SCHEDULER_IDENT for Cortex-A510 and Cortex-A520
    
    The SCHEDULER_IDENT for these two CPUs
    was incorrectly set to cortexa55.
    This can cause sub-optimal asm
     to be generated.
    
    gcc/ChangeLog:
            PR target/114272
            * config/aarch64/aarch64-cores.def (AARCH64_CORE):
            Change SCHEDULER_IDENT from cortexa55 to cortexa53
            for Cortex-A510 and Cortex-A520.

Diff:
---
 gcc/config/aarch64/aarch64-cores.def | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 7ebefcf543b..f69fc212d56 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -169,9 +169,9 @@ AARCH64_CORE("cortex-r82", cortexr82, cortexa53, V8R, (), cortexa53, 0x41, 0xd15
 /* Armv9.0-A Architecture Processors.  */
 
 /* Arm ('A') cores. */
-AARCH64_CORE("cortex-a510",  cortexa510, cortexa55, V9A,  (SVE2_BITPERM, MEMTAG, I8MM, BF16), cortexa53, 0x41, 0xd46, -1)
+AARCH64_CORE("cortex-a510",  cortexa510, cortexa53, V9A,  (SVE2_BITPERM, MEMTAG, I8MM, BF16), cortexa53, 0x41, 0xd46, -1)
 
-AARCH64_CORE("cortex-a520",  cortexa520, cortexa55, V9_2A,  (SVE2_BITPERM, MEMTAG), cortexa53, 0x41, 0xd80, -1)
+AARCH64_CORE("cortex-a520",  cortexa520, cortexa53, V9_2A,  (SVE2_BITPERM, MEMTAG), cortexa53, 0x41, 0xd80, -1)
 
 AARCH64_CORE("cortex-a710",  cortexa710, cortexa57, V9A,  (SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd47, -1)