[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned SAT_SUB form 8
Jeff Law
law@gcc.gnu.org
Mon Jun 24 14:59:27 GMT 2024
https://gcc.gnu.org/g:50afa42a634f3b6de549ef7de413b4bc8ff0bc84
commit 50afa42a634f3b6de549ef7de413b4bc8ff0bc84
Author: Pan Li <pan2.li@intel.com>
Date: Fri Jun 14 09:57:22 2024 +0800
RISC-V: Add testcases for scalar unsigned SAT_SUB form 8
After the middle-end support the form 8 of unsigned SAT_SUB and
the RISC-V backend implement the scalar .SAT_SUB, add more test
case to cover the form 8 of unsigned .SAT_SUB.
Form 8:
#define SAT_SUB_U_8(T) \
T sat_sub_u_8_##T (T x, T y) \
{ \
T ret; \
T overflow = __builtin_sub_overflow (x, y, &ret); \
return ret & (T)-(!overflow); \
}
Passed the rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat_arith.h: Add helper macro for test.
* gcc.target/riscv/sat_u_sub-29.c: New test.
* gcc.target/riscv/sat_u_sub-30.c: New test.
* gcc.target/riscv/sat_u_sub-31.c: New test.
* gcc.target/riscv/sat_u_sub-32.c: New test.
* gcc.target/riscv/sat_u_sub-run-29.c: New test.
* gcc.target/riscv/sat_u_sub-run-30.c: New test.
* gcc.target/riscv/sat_u_sub-run-31.c: New test.
* gcc.target/riscv/sat_u_sub-run-32.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
(cherry picked from commit 6d73bb157a7ddc8fe42fc2cb31f3e2371162a228)
Diff:
---
gcc/testsuite/gcc.target/riscv/sat_arith.h | 10 +++++++++
gcc/testsuite/gcc.target/riscv/sat_u_sub-29.c | 18 ++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_u_sub-30.c | 19 +++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_u_sub-31.c | 18 ++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_u_sub-32.c | 17 +++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_u_sub-run-29.c | 25 +++++++++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_u_sub-run-30.c | 25 +++++++++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_u_sub-run-31.c | 25 +++++++++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_u_sub-run-32.c | 25 +++++++++++++++++++++++
9 files changed, 182 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat_arith.h
index bde054d5c9d..9f901de5cdf 100644
--- a/gcc/testsuite/gcc.target/riscv/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat_arith.h
@@ -129,6 +129,15 @@ sat_u_sub_##T##_fmt_7 (T x, T y) \
return ret & (T)(overflow - 1); \
}
+#define DEF_SAT_U_SUB_FMT_8(T) \
+T __attribute__((noinline)) \
+sat_u_sub_##T##_fmt_8 (T x, T y) \
+{ \
+ T ret; \
+ T overflow = __builtin_sub_overflow (x, y, &ret); \
+ return ret & (T)-(!overflow); \
+}
+
#define RUN_SAT_U_SUB_FMT_1(T, x, y) sat_u_sub_##T##_fmt_1(x, y)
#define RUN_SAT_U_SUB_FMT_2(T, x, y) sat_u_sub_##T##_fmt_2(x, y)
#define RUN_SAT_U_SUB_FMT_3(T, x, y) sat_u_sub_##T##_fmt_3(x, y)
@@ -136,6 +145,7 @@ sat_u_sub_##T##_fmt_7 (T x, T y) \
#define RUN_SAT_U_SUB_FMT_5(T, x, y) sat_u_sub_##T##_fmt_5(x, y)
#define RUN_SAT_U_SUB_FMT_6(T, x, y) sat_u_sub_##T##_fmt_6(x, y)
#define RUN_SAT_U_SUB_FMT_7(T, x, y) sat_u_sub_##T##_fmt_7(x, y)
+#define RUN_SAT_U_SUB_FMT_8(T, x, y) sat_u_sub_##T##_fmt_8(x, y)
#define DEF_VEC_SAT_U_SUB_FMT_1(T) \
void __attribute__((noinline)) \
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-29.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-29.c
new file mode 100644
index 00000000000..1a2da50256e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-29.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint8_t_fmt_8:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*a0,\s*[atx][0-9]+
+** andi\s+a0,\s*a0,\s*0xff
+** ret
+*/
+DEF_SAT_U_SUB_FMT_8(uint8_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-30.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-30.c
new file mode 100644
index 00000000000..75aa7506369
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-30.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint16_t_fmt_8:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*a0,\s*a1
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slli\s+a0,\s*a0,\s*48
+** srli\s+a0,\s*a0,\s*48
+** ret
+*/
+DEF_SAT_U_SUB_FMT_8(uint16_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-31.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-31.c
new file mode 100644
index 00000000000..bc935ea0f3d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-31.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint32_t_fmt_8:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*a0,\s*a1
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** sext.w\s+a0,\s*a0
+** ret
+*/
+DEF_SAT_U_SUB_FMT_8(uint32_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-32.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-32.c
new file mode 100644
index 00000000000..f0f2254182c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-32.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint64_t_fmt_8:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*a0,\s*a1
+** addi\s+a0,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** ret
+*/
+DEF_SAT_U_SUB_FMT_8(uint64_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-29.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-29.c
new file mode 100644
index 00000000000..1f74562125b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-29.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint8_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_8
+
+DEF_SAT_U_SUB_FMT_8(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 255, 254, 1, },
+ { 255, 255, 0, },
+ { 254, 255, 0, },
+ { 253, 254, 0, },
+ { 0, 255, 0, },
+ { 1, 255, 0, },
+ { 32, 5, 27, },
+};
+
+#include "scalar_sat_binary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-30.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-30.c
new file mode 100644
index 00000000000..4e50e3f804e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-30.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint16_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_8
+
+DEF_SAT_U_SUB_FMT_8(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 65535, 65534, 1, },
+ { 65535, 65535, 0, },
+ { 65534, 65535, 0, },
+ { 65533, 65534, 0, },
+ { 0, 65535, 0, },
+ { 1, 65535, 0, },
+ { 35, 5, 30, },
+};
+
+#include "scalar_sat_binary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-31.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-31.c
new file mode 100644
index 00000000000..3c8f78d7ed3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-31.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint32_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_8
+
+DEF_SAT_U_SUB_FMT_8(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 4294967295, 4294967294, 1, },
+ { 4294967295, 4294967295, 0, },
+ { 4294967294, 4294967295, 0, },
+ { 4294967293, 4294967294, 0, },
+ { 1, 4294967295, 0, },
+ { 2, 4294967295, 0, },
+ { 5, 1, 4, },
+};
+
+#include "scalar_sat_binary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-32.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-32.c
new file mode 100644
index 00000000000..932596a28e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-32.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint64_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_8
+
+DEF_SAT_U_SUB_FMT_8(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 18446744073709551615u, 18446744073709551614u, 1, },
+ { 18446744073709551615u, 18446744073709551615u, 0, },
+ { 18446744073709551614u, 18446744073709551615u, 0, },
+ { 18446744073709551613u, 18446744073709551614u, 0, },
+ { 0, 18446744073709551615u, 0, },
+ { 1, 18446744073709551615u, 0, },
+ { 43, 11, 32, },
+};
+
+#include "scalar_sat_binary.h"
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