[gcc(refs/vendors/vrull/heads/slp-improvements)] Fix signedness warnings in aarch64_evpc_ins_uzp
Philipp Tomsich
ptomsich@gcc.gnu.org
Wed Jan 17 19:14:36 GMT 2024
https://gcc.gnu.org/g:313febe010385fe9dbca0af3611a84cfec650af6
commit 313febe010385fe9dbca0af3611a84cfec650af6
Author: Manolis Tsamis <manolis.tsamis@vrull.eu>
Date: Fri Nov 24 10:12:53 2023 +0100
Fix signedness warnings in aarch64_evpc_ins_uzp
Ref #344
Diff:
---
gcc/config/aarch64/aarch64.cc | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 7ae94091b7e..14b9a9d860e 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -25846,15 +25846,15 @@ aarch64_evpc_ins_uzp (struct expand_vec_perm_d *d)
return false;
/* We have a {A, B, A, B} permutation. */
- HOST_WIDE_INT A = d->perm[0].to_constant ();
- HOST_WIDE_INT B = d->perm[1].to_constant ();
+ unsigned HOST_WIDE_INT A = d->perm[0].to_constant ();
+ unsigned HOST_WIDE_INT B = d->perm[1].to_constant ();
if (A >= nelt || B < nelt || d->op0 == d->op1)
return false;
rtx insv;
rtx extractv;
- HOST_WIDE_INT idx, extractindex;
+ unsigned HOST_WIDE_INT idx, extractindex;
/* If A is the first element or B is the second element of a UZP1/2 then we
can emit this permute as INS + UZP . */
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