[gcc(refs/users/meissner/heads/work122)] Revert patches
Michael Meissner
meissner@gcc.gnu.org
Tue Jun 13 16:21:41 GMT 2023
https://gcc.gnu.org/g:936b5b082e70feb8ad2fb99023348490b003df38
commit 936b5b082e70feb8ad2fb99023348490b003df38
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Tue Jun 13 12:21:38 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 21 +++++++++------------
gcc/config/rs6000/genfusion.pl | 29 ++---------------------------
gcc/config/rs6000/rs6000.md | 4 ++--
gcc/testsuite/g++.target/powerpc/pr105325.C | 26 --------------------------
4 files changed, 13 insertions(+), 67 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index fdf710bdfc7..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
;; load mode is DI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(clobber (match_scratch:DI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
;; load mode is DI result mode is DI compare mode is CC extend is none
(define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
;; load mode is DI result mode is DI compare mode is CCUNS extend is none
(define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
[(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
- (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+ (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
(match_operand:DI 3 "const_0_to_1_operand" "n")))
(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -106,7 +106,7 @@
;; load mode is SI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -115,13 +115,12 @@
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
SImode, NON_PREFIXED_DS))"
- [(set (match_dup 0) (sign_extend:SI (match_dup 1)))
+ [(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -149,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -158,13 +157,12 @@
&& (cc_reg_not_cr0_operand (operands[2], CCmode)
|| !address_is_non_pfx_d_or_x (XEXP (operands[1], 0),
SImode, NON_PREFIXED_DS))"
- [(set (match_dup 0) (sign_extend:SI (match_dup 1)))
+ [(set (match_dup 0) (match_dup 1))
(set (match_dup 2)
(compare:CC (match_dup 0) (match_dup 3)))]
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -192,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "YZ")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -207,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 1a8419d41ef..82e8f863b02 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -61,14 +61,6 @@ sub gen_ld_cmpi_p10_one
my $mempred = "non_update_memory_operand";
my $extend;
- # We need to special case lwa. The prefixed_load_p function in rs6000.cc
- # (which determines if a load instruction is prefixed) uses the fact that the
- # register mode is different from the memory mode, and that the sign_extend
- # attribute is set to use DS-form rules for the address instead of D-form.
- # If the register size is the same, prefixed_load_p assumes we are doing a
- # lwz.
- my $lwa_insn = ($lmode eq "SI" && $ccmode eq "CC");
-
if ($ccmode eq "CC") {
# ld and lwa are both DS-FORM.
($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS";
@@ -99,15 +91,12 @@ sub gen_ld_cmpi_p10_one
}
my $ldst = mode_to_ldst_char($lmode);
-
- # DS-form addresses need YZ, and not m.
- my $constraint = ($mempred eq "ds_form_mem_operand") ? "YZ" : "m";
print <<HERE;
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
;; load mode is $lmode result mode is $result compare mode is $ccmode extend is $extend
(define_insn_and_split "*l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}_${result}_${ccmode}_${extend}"
[(set (match_operand:${ccmode} 2 "cc_reg_operand" "=x")
- (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "${constraint}")
+ (compare:${ccmode} (match_operand:${lmode} 1 "${mempred}" "m")
HERE
print " " if $ccmode eq "CCUNS";
print <<HERE;
@@ -137,12 +126,7 @@ HERE
${lmode}mode, ${np}))"
HERE
- # prefixed_load_p needs to see the register mode being different than the
- # memory insn in order to validate lwa as a DS-form instruction and not a
- # D-form instruction.
- if ($lwa_insn && $extend eq "none") {
- print " [(set (match_dup 0) (sign_extend:${clobbermode} (match_dup 1)))\n";
- } elsif ($extend eq "none") {
+ if ($extend eq "none") {
print " [(set (match_dup 0) (match_dup 1))\n";
} elsif ($result eq "clobber") {
print " [(set (match_dup 0) (${extend}_extend:${clobbermode} (match_dup 1)))\n";
@@ -156,15 +140,6 @@ HERE
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
-HERE
-
- if ($lwa_insn) {
- # prefixed_load_p needs the sign_extend attribute to validate lwa as a
- # DS-form instruction instead of D-form.
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
-
- print <<HERE
(set_attr "length" "8")])
HERE
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 75c5e5fc93d..b0db8ae508d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -287,7 +287,7 @@
;; Whether this insn has a prefixed form and a non-prefixed form.
(define_attr "maybe_prefixed" "no,yes"
(if_then_else (eq_attr "type" "load,fpload,vecload,store,fpstore,vecstore,
- integer,add,fused_load_cmpi")
+ integer,add")
(const_string "yes")
(const_string "no")))
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
- instead of PLWZ/CMPWI. Ultimately the code was dying because the fusion
- load + compare -1/0/1 patterns did not handle the possibility that the load
- might be prefixed. The -fstack-protector option is needed to show the
- bug. */
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[10000];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
More information about the Gcc-cvs
mailing list