[gcc r14-6678] aarch64: Fix parens in aarch64_stp_reg_operand [PR113061]

Alex Coplan acoplan@gcc.gnu.org
Tue Dec 19 09:23:34 GMT 2023


https://gcc.gnu.org/g:2cd55480857bf310c9be7daea39ea266772d3666

commit r14-6678-g2cd55480857bf310c9be7daea39ea266772d3666
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Tue Dec 19 09:22:20 2023 +0000

    aarch64: Fix parens in aarch64_stp_reg_operand [PR113061]
    
    In r14-6603-gfcdd2757c76bf925115b8e1ba4318d6366dd6f09 I messed up the
    parentheses in aarch64_stp_reg_operand, the indentation shows the intended
    nesting of the conditions.  This patch fixes that.
    
    This fixes PR113061 which shows IRA substituting (const_int 1) into a
    writeback stp pattern as a result (and LRA failing to reload the
    constant).
    
    gcc/ChangeLog:
    
            PR target/113061
            * config/aarch64/predicates.md (aarch64_stp_reg_operand): Fix
            parentheses to match intent.
    
    gcc/testsuite/ChangeLog:
    
            PR target/113061
            * gfortran.dg/PR113061.f90: New test.

Diff:
---
 gcc/config/aarch64/predicates.md       |  4 ++--
 gcc/testsuite/gfortran.dg/PR113061.f90 | 12 ++++++++++++
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index 9e6231691c0..510d4d2eaca 100644
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -323,7 +323,7 @@
 (define_special_predicate "aarch64_stp_reg_operand"
   (ior (match_operand 0 "aarch64_ldp_reg_operand")
        (and (match_code "const_int,const,const_vector,const_double")
-	    (match_test "aarch64_const_zero_rtx_p (op)"))
+	    (match_test "aarch64_const_zero_rtx_p (op)")
 	    (ior
 	      (match_test "GET_MODE (op) == VOIDmode")
 	      (and
@@ -331,7 +331,7 @@
 		(ior
 		  (match_test "mode == VOIDmode")
 		  (match_test "known_eq (GET_MODE_SIZE (mode),
-					 GET_MODE_SIZE (GET_MODE (op)))"))))))
+					 GET_MODE_SIZE (GET_MODE (op)))")))))))
 
 ;; Used for storing two 64-bit values in an AdvSIMD register using an STP
 ;; as a 128-bit vec_concat.
diff --git a/gcc/testsuite/gfortran.dg/PR113061.f90 b/gcc/testsuite/gfortran.dg/PR113061.f90
new file mode 100644
index 00000000000..989bc385c76
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/PR113061.f90
@@ -0,0 +1,12 @@
+! { dg-do compile }
+! { dg-options "-fno-move-loop-invariants -Oz" }
+module module_foo
+  use iso_c_binding
+  contains
+  subroutine foo(a) bind(c)
+    type(c_ptr)  a(..)
+    select rank(a)
+    end select
+    call bar
+  end
+end


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