[gcc(refs/vendors/ARM/heads/morello)] Rework gen_lowpart_if_possible, fix ICE

Matthew Malcomson matmal01@gcc.gnu.org
Mon Mar 14 10:34:41 GMT 2022


https://gcc.gnu.org/g:9801bfdd265769750005062c7a0cce23daf97737

commit 9801bfdd265769750005062c7a0cce23daf97737
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Wed Mar 2 10:05:11 2022 +0000

    Rework gen_lowpart_if_possible, fix ICE
    
    For the testcase added in this patch, expand_debug_expr would create an
    rtx of the form:
    
    (truncate:DI (mem:CADI (symbol_ref:CADI ...)))
    
    and we would later ICE in rtlanal.c:num_sign_bit_copies1, where we
    (quite reasonably) don't expect to see an rtx of this form. Since the
    TRUNCATE was originally created through the simplify_* routines, this
    should be simplified to just:
    
    (mem:DI (symbol_ref:CADI ...))
    
    Specifically, simplify_unary_operation_1 in the TRUNCATE case has logic
    to attempt using a SUBREG instead, where this is possible. It does this
    using gen_lowpart_if_possible. The MEM_P case of gen_lowpart_if_possible
    looks like it should perform the desired transformation, but
    unfortunately it checks memory_address_addr_space_p on the resulting MEM
    address, and bails if this doesn't hold. In this case,
    memory_address_addr_space_p never held for the MEM in the first place,
    and in general need not hold for all MEMs in arbitrary rtl.
    
    This patch reworks gen_lowpart_if_possible to use lowpart_subreg if the
    initial gen_lowpart_common call fails and the rtx has non-VOIDmode.
    With this change, we can now perform the desired transformation.
    
    gcc/ChangeLog:
    
            * rtlhooks.c (gen_lowpart_if_possible): Rework to use
            lowpart_subreg.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/aarch64/morello/debug-truncate-ice.c: New test.

Diff:
---
 gcc/rtlhooks.c                                       | 20 ++++----------------
 .../gcc.target/aarch64/morello/debug-truncate-ice.c  | 12 ++++++++++++
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/gcc/rtlhooks.c b/gcc/rtlhooks.c
index 7b3092a434f..13e53459a4e 100644
--- a/gcc/rtlhooks.c
+++ b/gcc/rtlhooks.c
@@ -112,22 +112,10 @@ gen_lowpart_if_possible (machine_mode mode, rtx x)
 
   if (result)
     return result;
-  else if (MEM_P (x))
-    {
-      /* This is the only other case we handle.  */
-      poly_int64 offset = byte_lowpart_offset (mode, GET_MODE (x));
-      rtx new_rtx = adjust_address_nv (x, mode, offset);
-      if (! memory_address_addr_space_p (mode, XEXP (new_rtx, 0),
-					 MEM_ADDR_SPACE (x)))
-	return 0;
 
-      return new_rtx;
-    }
-  else if (mode != GET_MODE (x) && GET_MODE (x) != VOIDmode && !SUBREG_P (x)
-	   && validate_subreg (mode, GET_MODE (x), x,
-			       subreg_lowpart_offset (mode, GET_MODE (x))))
-    return gen_lowpart_SUBREG (mode, x);
-  else
-    return 0;
+  if (GET_MODE (x) != VOIDmode)
+    return lowpart_subreg (mode, x, GET_MODE (x));
+
+  return 0;
 }
 
diff --git a/gcc/testsuite/gcc.target/aarch64/morello/debug-truncate-ice.c b/gcc/testsuite/gcc.target/aarch64/morello/debug-truncate-ice.c
new file mode 100644
index 00000000000..9153ef153a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/morello/debug-truncate-ice.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=morello+c64 -mabi=purecap -O2 -g" } */
+char *a;
+void b();
+void c(int d) {
+  if (d)
+    b();
+}
+int e() {
+  c(a == 0);
+  return 0;
+}


More information about the Gcc-cvs mailing list