[gcc(refs/users/meissner/heads/work080)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:5c331a93fb78bfa1074ec430f130d7212588c7e0

commit 5c331a93fb78bfa1074ec430f130d7212588c7e0
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Mar 4 19:03:12 2022 -0500

    Update ChangeLog.meissner.
    
    2022-03-04   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 10 ++++++++++
 gcc/testsuite/ChangeLog.meissner |  7 +++++++
 2 files changed, 17 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index cdf9213b8ce..544d268fb9c 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,13 @@
+work080, patch #1:
+2022-03-04   Michael Meissner  <meissner@linux.ibm.com>
+
+	PR target/104698
+	* config/rs6000/vsx.md (UNSPEC_MTVSRD_DITI_W1): Delete.
+	(mtvsrdd_diti_w1): Delete.
+	(extendditi2): Convert from define_expand to
+	define_insn_and_split.  Replace with code to deal with both GPR
+	registers and with altivec registers.
+
 2022-03-04   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index cdf9213b8ce..bcbb87441b3 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,10 @@
+work080, patch #1:
+2022-03-04   Michael Meissner  <meissner@linux.ibm.com>
+
+	PR target/104698
+	* gcc.target/powerpc/pr104698-1.c: New test.
+	* gcc.target/powerpc/pr104698-2.c: New test.
+
 2022-03-04   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch