[gcc r11-9515] aarch64: [PR101529] Fix vector shuffle insertion expansion

[Andrew Pinski]

https://gcc.gnu.org/g:193e5ee46e5a4f0650dc1ccbdaec5d2e84f2a451

commit r11-9515-g193e5ee46e5a4f0650dc1ccbdaec5d2e84f2a451
Author: Andrew Pinski <apinski@marvell.com>
Date:   Sat Nov 6 06:29:13 2021 +0000

    aarch64: [PR101529] Fix vector shuffle insertion expansion
    
    The function aarch64_evpc_ins would reuse the target even though
    it might be the same register as the two inputs.
    Instead of checking to see if we can reuse the target, just use the
    original input directly.
    
    Committed as approved after bootstrapped and tested on
    aarch64-linux-gnu with no regressions.
    Note the testcases are not backported as __builtin_shufflevector
    does not exist in GCC 11.
    
            PR target/101529
    
    gcc/ChangeLog:
    
            * config/aarch64/aarch64.c (aarch64_evpc_ins): Don't use target
            as an input, use original one.
    
    (cherry picked from commit 52fa771758635d9c53cddb9116e5a66fae592230)

Diff:
---
 gcc/config/aarch64/aarch64.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index bbcf5ed4a61..b58a379759d 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -23026,11 +23026,10 @@ aarch64_evpc_ins (struct expand_vec_perm_d *d)
     }
   gcc_assert (extractindex < nelt);
 
-  emit_move_insn (d->target, insv);
   insn_code icode = code_for_aarch64_simd_vec_copy_lane (mode);
   expand_operand ops[5];
   create_output_operand (&ops[0], d->target, mode);
-  create_input_operand (&ops[1], d->target, mode);
+  create_input_operand (&ops[1], insv, mode);
   create_integer_operand (&ops[2], 1 << idx);
   create_input_operand (&ops[3], extractv, mode);
   create_integer_operand (&ops[4], extractindex);