[gcc/devel/omp/gcc-11] amdgcn: Allow vector reductions on constants

Andrew Stubbs ams@gcc.gnu.org
Mon Feb 14 15:54:12 GMT 2022


https://gcc.gnu.org/g:5359f8058bfa669a60b07151bbffb1595152ce7e

commit 5359f8058bfa669a60b07151bbffb1595152ce7e
Author: Andrew Stubbs <ams@codesourcery.com>
Date:   Sat Feb 12 23:44:48 2022 +0000

    amdgcn: Allow vector reductions on constants
    
    Obviously it would be better if these reductions could be evaluated at compile
    time, but this will avoid an ICE.
    
    gcc/ChangeLog:
    
            * config/gcn/gcn.c (gcn_expand_reduc_scalar): Use force_reg.
    
    (cherry picked from commit d51cad0b840a14c66732cb6a166c11ddf55d18b2)

Diff:
---
 gcc/config/gcn/gcn.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c
index 93b66fa8497..5c390c69865 100644
--- a/gcc/config/gcn/gcn.c
+++ b/gcc/config/gcn/gcn.c
@@ -4431,7 +4431,7 @@ gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec)
      pair of lanes, then on every pair of results from the previous
      iteration (thereby effectively reducing every 4 lanes) and so on until
      all lanes are reduced.  */
-  rtx in, out = src;
+  rtx in, out = force_reg (mode, src);
   for (int i = 0, shift = 1; i < 6; i++, shift <<= 1)
     {
       rtx shift_val = gen_rtx_CONST_INT (VOIDmode, shift);


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