[gcc r12-6995] AArch32: use canonical ordering for complex mul, fma and fms

[Tamar Christina]

https://gcc.gnu.org/g:9f6f411f63f3aceddd846e4b0d27202a6e13d42c

commit r12-6995-g9f6f411f63f3aceddd846e4b0d27202a6e13d42c
Author: Tamar Christina <tamar.christina@arm.com>
Date:   Wed Feb 2 10:52:17 2022 +0000

    AArch32: use canonical ordering for complex mul, fma and fms
    
    After the first patch in the series this updates the optabs to expect the
    canonical sequence.
    
    gcc/ChangeLog:
    
            PR tree-optimization/102819
            PR tree-optimization/103169
            * config/arm/vec-common.md (cml<fcmac1><conj_op><mode>4): Use
            canonical order.

Diff:
---
 gcc/config/arm/vec-common.md | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md
index cef358e44f5..2718d82c364 100644
--- a/gcc/config/arm/vec-common.md
+++ b/gcc/config/arm/vec-common.md
@@ -265,18 +265,18 @@
 ;; remainder.  Because of this, expand early.
 (define_expand "cml<fcmac1><conj_op><mode>4"
   [(set (match_operand:VF 0 "register_operand")
-	(plus:VF (match_operand:VF 1 "register_operand")
-		 (unspec:VF [(match_operand:VF 2 "register_operand")
-			     (match_operand:VF 3 "register_operand")]
-			    VCMLA_OP)))]
+	(plus:VF (unspec:VF [(match_operand:VF 1 "register_operand")
+			     (match_operand:VF 2 "register_operand")]
+			    VCMLA_OP)
+		 (match_operand:VF 3 "register_operand")))]
   "(TARGET_COMPLEX || (TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT
 		      && ARM_HAVE_<MODE>_ARITH)) && !BYTES_BIG_ENDIAN"
 {
   rtx tmp = gen_reg_rtx (<MODE>mode);
-  emit_insn (gen_arm_vcmla<rotsplit1><mode> (tmp, operands[1],
-					     operands[3], operands[2]));
+  emit_insn (gen_arm_vcmla<rotsplit1><mode> (tmp, operands[3],
+					     operands[2], operands[1]));
   emit_insn (gen_arm_vcmla<rotsplit2><mode> (operands[0], tmp,
-					     operands[3], operands[2]));
+					     operands[2], operands[1]));
   DONE;
 })