[gcc(refs/users/meissner/heads/work067)] Update ChangeLog.meissner.

Michael Meissner meissner@gcc.gnu.org
Tue Sep 7 00:31:52 GMT 2021


https://gcc.gnu.org/g:0d5bd29f8c43ed5fff45578338dd6b1a6c6e5874

commit 0d5bd29f8c43ed5fff45578338dd6b1a6c6e5874
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Sep 6 20:31:31 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-09-06  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-09-06  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 110 +++++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner |  31 +++++++++++
 2 files changed, 141 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 15c876737ad..8e4c43c029f 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,113 @@
+work067.patch005:
+2021-09-06  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.c (rs6000_emit_move_si_sf_subreg): Deal
+	with SUBREGs of TImode and DImode.
+
+work067.patch004:
+2021-09-06  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/constraint.md (eD): New constraint.
+	* config/rs6000/predicates.md (easy_fp_constant): If the constant
+	can be loaded with XXSPLTI32DX, it is easy.
+	(xxsplti32dx_operand): New predicate.
+	(easy_vector_constant): If the constant can be loaded with
+	XXSPLTI32DX, it is easy.
+	* config/rs6000/rs6000-protos.h (xxsplti32dx_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (xxsplti32dx_constant_float_p): New
+	helper function.
+	(xxsplti32dx_constant_p): New function.
+	(output_vec_const_move): If the operand can be loaded with
+	XXSPLTI32DX, split it.
+	(prefixed_permute_p): Constants loaded with XXSPLTI32DX are
+	prefixed.
+	* config/rs6000/rs6000.md (movsf_hardfloat): Add support for
+	constants loaded with XXSPLTI32DX.
+	(mov<mode>_hardfloat32, FMOVE64 iterator):  Add support for
+	constants loaded with XXSPLTI32DX.
+	(mov<mode>_hardfloat64, FMOVE64 iterator):  Add support for
+	constants loaded with XXSPLTI32DX.
+	* config/rs6000/rs6000.opt (-mxxsplti32dx): New option.
+	* config/rs6000/vsx.md (UNSPEC_XXSPLTI32DX_CONST): New unspec.
+	(XXSPLTI32DX): New mode iterator.
+	(xxsplti32dx_<mode>): New insn and splitter for XXSPLTI32DX.
+	(xxsplti32dx_<mode>_first): New insn.
+	(xxsplti32dx_<mode>_second): New insn.
+
+work067.patch003:
+2021-09-06  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/constraints.md (eW): New constraint.
+	* config/rs6000/predicates.md (xxspltiw_operand): New predicate.
+	(easy_vector_constant): If we can use XXSPLTIW, the vector
+	constant is easy.
+	* config/rs6000/rs6000-protos.h (xxspltiw_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (xxspltib_constant_p): If we can generate
+	XXSPLTIW, don't generate a XXSPLTIB and an extend instruction.
+	(const_vector_all_elements_equal_p): New function.
+	(xxspltiw_constant_p): New function.
+	(output_vec_const_move): Add support for loading up vector
+	constants with XXSPLTIW.
+	(prefixed_permute_p): Recognize xxspltiw instructions as
+	prefixed.
+	* config/rs6000/rs6000.opt (-mxxspltiw): New debug switch.
+	* config/rs6000/vsx.md (vsx_mov<mode>_64bit): Add support for
+	constants loaded with XXSPLTIW.
+	(vsx_mov<mode>_32bit): Likewise.
+	(vsx_splat_v8hi_xxspltiw): New insn.
+	(vsx_splat_v4si_xxspltiw): New insn.
+	(vsx_splat_v4sf_xxspltiw): New insn.
+
+work067.patch002:
+2021-09-06  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/constraints.md (eQ): New constraint.
+	* config/rs6000/predicates.md (easy_fp_constant): If we can use
+	LXVKQ, it is an easy floating point constant.
+	(lxvkq_operand): New predicate.
+	* config/rs6000/rs6000-protos.h (lxvkq_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (lxvkq_constant_p): New function.
+	(output_vec_const_move): Add support for LXVKQ.
+	(rs6000_output_move_128bit): Likewise.
+	* config/rs6000/rs6000.opt (-mlxvkq): New debug option.
+	* config/rs6000/vsx.md (vsx_mov<mode>_64bit): Add support for
+	LXVKQ.
+	(vsx_mov<mode>_32bit): Likewise.
+
+work067.patch001:
+2021-09-02  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/constraints.md (eF): New constraint.
+	* config/rs6000/predicates.md (easy_fp_constant): If we can load
+	the scalar constant with XXSPLTIDP, the floating point constant is
+	easy.
+	(xxspltidp_operand): New predicate.
+	(easy_vector_constant): If we can generate XXSPLTIDP, mark the
+	vector constant as easy.
+	* config/rs6000/rs6000-protos.h (xxspltidp_constant_p): New
+	declaration.
+	(prefixed_permute_p): Likewise.
+	* config/rs6000/rs6000.c (xxspltidp_constant_p): New function.
+	(output_vec_const_move): Add support for XXSPLTIDP.
+	(prefixed_permute_p): New function.
+	* config/rs6000/rs6000.md (prefixed attribute): Add support for
+	permute prefixed instructions.
+	(movsf_hardfloat): Add XXSPLTIDP support.
+	(mov<mode>_hardfloat32, FMOVE64 iterator): Likewise.
+	(mov<mode>_hardfloat64, FMOVE64 iterator): Likewise.
+	* config/rs6000/rs6000.opt (-mxxspltidp): New switch.
+	* config/rs6000/vsx.md (vsx_move<mode>_64bit): Add XXSPLTIDP
+	support.
+	(vsx_move<mode>_32bit): Likewise.
+	(vsx_splat_v2df_xxspltidp): New insn.
+	(XXSPLTIDP): New mode iterator.
+	(xxspltidp_<mode>_internal): New insn and splits.
+	(xxspltidp_<mode>_inst): Replace xxspltidp_v2df_inst with an
+	iterated form that also does SFmode, and DFmode.
+
 2021-09-01   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 15c876737ad..12ec3136060 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,34 @@
+work067.patch004:
+2021-09-06  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/pr86731-fwrapv-longlong.c: Update insn
+	count.
+	* gcc.target/powerpc/vec-splat-constant-sf.c: Update insn count.
+	Add -mxxsplti32dx option.
+	* gcc.target/powerpc/vec-splat-constant-df.c: Likewise.
+	* gcc.target/powerpc/vec-splat-constant-v2df.c: Likewise.
+
+work067.patch003:
+2021-09-06  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-splat-constant-v16qi.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v4sf.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v4si.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v8hi.c: New test.
+	* gcc.target/powerpc/vec-splati-runnable.c: Update insn counts.
+
+work067.patch002:
+2021-09-06  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/float128-constant.c: New test.
+
+work067.patch001:
+2021-09-02  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-splat-constant-sf.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-df.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v2df.c: New test.
+
 2021-09-01   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch


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