[gcc(refs/users/meissner/heads/work066)] Test for being able to generate VSPLTISH or VSPLTISW.
Michael Meissner
meissner@gcc.gnu.org
Thu Sep 2 03:53:06 GMT 2021
https://gcc.gnu.org/g:c0e0363f38d721cb81777cd33ef0b61b4319b600
commit c0e0363f38d721cb81777cd33ef0b61b4319b600
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Sep 1 23:52:48 2021 -0400
Test for being able to generate VSPLTISH or VSPLTISW.
2021-09-01 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000.c (xxspltiw_constant_p): Add tests for
being able to generate VSPLTISH or VSPLTISW.
Diff:
---
gcc/config/rs6000/rs6000.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 7e12a661421..90c6edd505e 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -6647,6 +6647,10 @@ xxspltiw_constant_p (rtx op,
if (!BYTES_BIG_ENDIAN)
std::swap (value0, value1);
+ /* If we can do a VSPLTISW, don't do the XXSPLTIW. */
+ if (value0 == 0 && EASY_VECTOR_15 (value1))
+ return false;
+
*constant_ptr = (value0 << 16) | value1;
return true;
}
@@ -6655,7 +6659,10 @@ xxspltiw_constant_p (rtx op,
the next set of 4 elements, and so forth can generate XXSPLTIW. */
case V16QImode:
{
- if (xxspltib_constant_nosplit (op, mode))
+ /* Can we generate a single non-prefixed instruction? */
+ if (xxspltib_constant_nosplit (op, mode) /* XXSPLTIB. */
+ || vspltis_constant (op, 4, 2) /* VSPLTIH. */
+ || vspltis_constant (op, 4, 1)) /* VSPLTIW. */
return false;
rtx element1 = CONST_VECTOR_ELT (op, 1);
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