[gcc(refs/users/meissner/heads/work041)] Change XXSPLTIxx from vecsimple to vecperm.

[Michael Meissner]

https://gcc.gnu.org/g:4368fb76eed2f49ebe5a58a6357e19e35c9e7f5b

commit 4368fb76eed2f49ebe5a58a6357e19e35c9e7f5b
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Mar 17 15:12:12 2021 -0400

    Change XXSPLTIxx from vecsimple to vecperm.
    
    gcc/
    2021-03-17  Michael Meissner  <meissner@linux.ibm.com>
    
            * config/rs6000/altivec.md (xxspltiw_v4si): Use vecperm instead of
            vecsimple.
            (xxspltiw_v4sf): Likewise.
            (xxspltidp_v2df_inst): Likewise.
            (xxsplti32dx_v4si): Likewise.
            (xxsplti32dx_v4si_inst): Likewise.
            (xxsplti32dx_v4sf_inst): Likewise.
            (xxblend_<mode>): Likewise.
            (xxpermx): Likewise.
            (xxpermx_inst): Likewise.
            * config/rs6000/rs6000.md (xxspltidp<mode>): Use vecperm instead
            of vecsimple.
            (mov<mode>_hardfloat6): Likewise.
            * config/rs6000/vsx.md (vsx_mov<mode>_64bit): Use vecperm instead
            of vecsimple.
            (vsx_mov<mode>_32bit): Likewise.

Diff:
---
 gcc/config/rs6000/altivec.md | 18 +++++++++---------
 gcc/config/rs6000/rs6000.md  |  4 ++--
 gcc/config/rs6000/vsx.md     |  4 ++--
 3 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index c6685509e3d..536f0b9e1c9 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -829,7 +829,7 @@
   xxspltib %x0,0
   xxspltib %x0,255
   xxspltiw %x0,%1"
- [(set_attr "type" "vecsimple")
+ [(set_attr "type" "vecsimple,vecsimple,vecsimple,vecperm")
   (set_attr "prefixed" "*,*,*,yes")
   (set_attr "prefixed_prepend_p" "*,*,*,no")])
 
@@ -845,7 +845,7 @@
   operands[2] = GEN_INT (rs6000_const_f32_to_i32 (operands[1]));
   return "xxspltiw %x0,%2";
 }
- [(set_attr "type" "vecsimple")
+ [(set_attr "type" "vecsimple,vecperm")
   (set_attr "prefixed" "*,yes")
   (set_attr "prefixed_prepend_p" "*,no")])
 
@@ -866,7 +866,7 @@
 		     UNSPEC_XXSPLTIDP))]
   "TARGET_POWER10"
   "xxspltidp %x0,%1"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
   (set_attr "prefixed" "yes")
   (set_attr "prefixed_prepend_p" "no")])
 
@@ -887,7 +887,7 @@
 					 GEN_INT (index), operands[3]));
    DONE;
 }
- [(set_attr "type" "vecsimple")])
+ [(set_attr "type" "vecperm")])
 
 (define_insn "xxsplti32dx_v4si_inst"
   [(set (match_operand:V4SI 0 "register_operand" "=wa")
@@ -897,7 +897,7 @@
 		     UNSPEC_XXSPLTI32DX))]
   "TARGET_POWER10"
   "xxsplti32dx %x0,%2,%3"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")
    (set_attr "prefixed_prepend_p" "no")])
 
@@ -927,7 +927,7 @@
 		     UNSPEC_XXSPLTI32DX))]
   "TARGET_POWER10"
   "xxsplti32dx %x0,%2,%3"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")
    (set_attr "prefixed_prepend_p" "no")])
 
@@ -939,7 +939,7 @@
 		    UNSPEC_XXBLEND))]
   "TARGET_POWER10"
   "xxblendv<VM3_char> %x0,%x1,%x2,%x3"
-  [(set_attr "type" "vecsimple")])
+  [(set_attr "type" "vecperm")])
 
 (define_expand "xxpermx"
   [(set (match_operand:V2DI 0 "register_operand" "+wa")
@@ -972,7 +972,7 @@
 
   DONE;
 }
-  [(set_attr "type" "vecsimple")])
+  [(set_attr "type" "vecperm")])
 
 (define_insn "xxpermx_inst"
   [(set (match_operand:V2DI 0 "register_operand" "+v")
@@ -983,7 +983,7 @@
 		     UNSPEC_XXPERMX))]
   "TARGET_POWER10"
   "xxpermx %x0,%x1,%x2,%x3,%4"
-  [(set_attr "type" "vecsimple")])
+  [(set_attr "type" "vecperm")])
 
 (define_expand "vstrir_<mode>"
   [(set (match_operand:VIshort 0 "altivec_register_operand")
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 2c6296c1f18..bcfcf4c308c 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -7570,7 +7570,7 @@
 			   UNSPEC_XXSPLTIDP))]
   "TARGET_POWER10 && TARGET_VSX"
   "xxspltidp %x0,%1"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")
    (set_attr "prefixed_prepend_p" "no")])
 
@@ -8033,7 +8033,7 @@
   [(set_attr "type"
             "fpstore,     fpload,     fpsimple,   fpload,     fpstore,
              fpload,      fpstore,    veclogical, veclogical, integer,
-             vecsimple,
+             vecperm,
              store,       load,       *,          mtjmpr,     mfjmpr,
              *,           mfvsr,      mtvsr")
    (set_attr "size" "64")
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index c2153eb0bcf..c622236c1e2 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -1188,7 +1188,7 @@
   [(set_attr "type"
                "vecstore,  vecload,   vecsimple, mtvsr,     mfvsr,     load,
                 store,     load,      store,     *,         vecsimple, vecsimple,
-                vecsimple, *,         *,         vecstore,  vecload,   vecsimple")
+                vecsimple, *,         *,         vecstore,  vecload,   vecperm")
    (set_attr "num_insns"
                "*,         *,         *,         2,         *,         2,
                 2,         2,         2,         2,         *,         *,
@@ -1236,7 +1236,7 @@
 }
   [(set_attr "type"
                "vecstore,  vecload,   vecsimple, load,      store,    *,
-                vecsimple, vecsimple, vecsimple, *,         *,        vecsimple,
+                vecsimple, vecsimple, vecsimple, *,         *,        vecperm,
                 vecstore,  vecload")
    (set_attr "length"
                "*,         *,         *,         16,        16,        16,