[gcc r10-9443] ira: Make sure allocno copies are ordered [PR98791]

Andre Simoes Dias Vieira avieira@gcc.gnu.org
Mon Mar 15 11:18:18 GMT 2021


https://gcc.gnu.org/g:9b0bbe19afb2a6800e95f61cc57206e069a400d6

commit r10-9443-g9b0bbe19afb2a6800e95f61cc57206e069a400d6
Author: Andre Vieira <andre.simoesdiasvieira@arm.com>
Date:   Mon Feb 22 13:41:46 2021 +0000

    ira: Make sure allocno copies are ordered [PR98791]
    
    gcc/ChangeLog:
    2021-02-22  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    
            PR rtl-optimization/98791
            * ira-conflicts.c (process_regs_for_copy): Don't create allocno copies
            for unordered modes.
    
    gcc/testsuite/ChangeLog:
    2021-02-22  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    
            PR rtl-optimization/98791
            * gcc.target/aarch64/sve/pr98791.c: New test.
    
    (cherry picked from commit 4c31a3a6d31b6214ea774d403bf8ab7ebe1ea862)

Diff:
---
 gcc/ira-conflicts.c                            |  5 ++++-
 gcc/testsuite/gcc.target/aarch64/sve/pr98791.c | 12 ++++++++++++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/gcc/ira-conflicts.c b/gcc/ira-conflicts.c
index 0220e725e55..5122b90a9aa 100644
--- a/gcc/ira-conflicts.c
+++ b/gcc/ira-conflicts.c
@@ -275,7 +275,10 @@ process_regs_for_copy (rtx reg1, rtx reg2, bool constraint_p,
       ira_allocno_t a1 = ira_curr_regno_allocno_map[REGNO (reg1)];
       ira_allocno_t a2 = ira_curr_regno_allocno_map[REGNO (reg2)];
 
-      if (!allocnos_conflict_for_copy_p (a1, a2) && offset1 == offset2)
+      if (!allocnos_conflict_for_copy_p (a1, a2)
+	  && offset1 == offset2
+	  && ordered_p (GET_MODE_PRECISION (ALLOCNO_MODE (a1)),
+			GET_MODE_PRECISION (ALLOCNO_MODE (a2))))
 	{
 	  cp = ira_add_allocno_copy (a1, a2, freq, constraint_p, insn,
 				     ira_curr_loop_tree_node);
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr98791.c b/gcc/testsuite/gcc.target/aarch64/sve/pr98791.c
new file mode 100644
index 00000000000..cc1f1831afb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr98791.c
@@ -0,0 +1,12 @@
+/* PR rtl-optimization/98791  */
+/* { dg-do compile } */
+/* { dg-options "-O -ftree-vectorize" } */
+#include <arm_sve.h>
+extern char a[11];
+extern long b[];
+void f() {
+  for (int d; d < 10; d++) {
+    a[d] = svaddv(svptrue_b8(), svdup_u8(0));
+    b[d] = 0;
+  }
+}


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