[gcc r10-9400] RISC-V: Implement __builtin_thread_pointer

[Kito Cheng]

https://gcc.gnu.org/g:b580cc4bdb8f4875e4d507d9413ef4ee90914e32

commit r10-9400-gb580cc4bdb8f4875e4d507d9413ef4ee90914e32
Author: Kito Cheng <kito.cheng@sifive.com>
Date:   Tue Jul 7 16:20:53 2020 +0800

    RISC-V: Implement __builtin_thread_pointer
    
    RISC-V has a dedicate register for thread pointer which is specified in psABI
    doc, so we could support __builtin_thread_pointer in straightforward way.
    
    Note: clang/llvm was supported __builtin_thread_pointer for RISC-V port
    recently.
    - https://reviews.llvm.org/rGaabc24acf0d5f8677bd22fe9c108581e07c3e180
    
    gcc/ChangeLog:
    
            * config/riscv/riscv.md (get_thread_pointer<mode>): New.
            (TP_REGNUM): Ditto.
            * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
            Document __builtin_thread_pointer.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/read-thread-pointer.c: New.
    
    (cherry picked from commit 1073b500e5d33af8b75567108a8c04fe2598df2b)

Diff:
---
 gcc/config/riscv/riscv.md                            |  8 ++++++++
 gcc/doc/extend.texi                                  | 11 +++++++++++
 gcc/testsuite/gcc.target/riscv/read-thread-pointer.c |  7 +++++++
 3 files changed, 26 insertions(+)

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 217655ea6cc..7a292d0b5b4 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -70,6 +70,7 @@
 (define_constants
   [(RETURN_ADDR_REGNUM		1)
    (GP_REGNUM 			3)
+   (TP_REGNUM			4)
    (T0_REGNUM			5)
    (T1_REGNUM			6)
    (S0_REGNUM			8)
@@ -2493,6 +2494,13 @@
   DONE;
 })
 
+;; Named pattern for expanding thread pointer reference.
+(define_expand "get_thread_pointer<mode>"
+  [(set (match_operand:P 0 "register_operand" "=r")
+	(reg:P TP_REGNUM))]
+  ""
+{})
+
 (include "sync.md")
 (include "peephole.md")
 (include "pic.md")
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 7a59413d33a..52f8364fccc 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -13787,6 +13787,7 @@ instructions, but allow the compiler to schedule those calls.
 * PowerPC Hardware Transactional Memory Built-in Functions::
 * PowerPC Atomic Memory Operation Functions::
 * PowerPC Matrix-Multiply Assist Built-in Functions::
+* RISC-V Built-in Functions::
 * RX Built-in Functions::
 * S/390 System z Built-in Functions::
 * SH Built-in Functions::
@@ -20962,6 +20963,16 @@ vec_t __builtin_vsx_xvcvspbf16 (vec_t);
 vec_t __builtin_vsx_xvcvbf16spn (vec_t);
 @end smallexample
 
+@node RISC-V Built-in Functions
+@subsection RISC-V Built-in Functions
+
+These built-in functions are available for the RISC-V family of
+processors.
+
+@deftypefn {Built-in Function} {void *} __builtin_thread_pointer (void)
+Returns the value that is currently set in the @samp{tp} register.
+@end deftypefn
+
 @node RX Built-in Functions
 @subsection RX Built-in Functions
 GCC supports some of the RX instructions which cannot be expressed in
diff --git a/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c b/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c
new file mode 100644
index 00000000000..760f8eafb40
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+
+void *get_tp()
+{
+    return __builtin_thread_pointer ();
+}
+/* { dg-final { scan-assembler "mv\[ \t\]*[at][0-9]+,tp" } } */