[gcc r10-9254] aarch64: Extend aarch64-autovec-preference==2 to 128-bit SVE

[Richard Sandiford]

https://gcc.gnu.org/g:c97c4eb81b160a3e4860e05f79a480bd22b08d78

commit r10-9254-gc97c4eb81b160a3e4860e05f79a480bd22b08d78
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Tue Jan 12 09:55:43 2021 +0000

    aarch64: Extend aarch64-autovec-preference==2 to 128-bit SVE
    
    When compiling with -msve-vector-bits=128, aarch64_preferred_simd_mode
    would pass the same vector width to aarch64_simd_container_mode for
    both SVE and Advanced SIMD, and so Advanced SIMD would always “win”.
    This patch instead makes it choose directly between SVE and Advanced
    SIMD modes, so that aarch64-autovec-preference==2 and
    aarch64-autovec-preference==4 work for this configuration.
    
    (aarch64-autovec-preference shouldn't affect aarch64_simd_container_mode
    because that would have an ABI impact for things like GNU vectors.)
    
    gcc/
            * config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Use
            aarch64_full_sve_mode and aarch64_vq_mode directly, instead of
            going via aarch64_simd_container_mode.
    
    (cherry picked from commit 7ff5706fcd732b671afb2d308e8dab7e23050823)

Diff:
---
 gcc/config/aarch64/aarch64.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 4668c2c0c75..9254261fd1d 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -17379,10 +17379,11 @@ aarch64_preferred_simd_mode (scalar_mode mode)
 {
   /* Take into account explicit auto-vectorization ISA preferences through
      aarch64_cmp_autovec_modes.  */
-  poly_int64 bits
-    = (TARGET_SVE && aarch64_cmp_autovec_modes (VNx16QImode, V16QImode))
-       ? BITS_PER_SVE_VECTOR : 128;
-  return aarch64_simd_container_mode (mode, bits);
+  if (TARGET_SVE && aarch64_cmp_autovec_modes (VNx16QImode, V16QImode))
+    return aarch64_full_sve_mode (mode).else_mode (word_mode);
+  if (TARGET_SIMD)
+    return aarch64_vq_mode (mode).else_mode (word_mode);
+  return word_mode;
 }
 
 /* Return a list of possible vector sizes for the vectorizer