[gcc(refs/vendors/ibm/heads/gcc-9-branch)] rs6000, Fix header comment for intrinsic function _mm_movemask_epi8

[Peter Bergner]

https://gcc.gnu.org/g:0c9344e0250db274277cc3e1d6bd56d64ee01a05

commit 0c9344e0250db274277cc3e1d6bd56d64ee01a05
Author: Carl Love <carll@us.ibm.com>
Date:   Wed Apr 22 11:57:53 2020 -0500

    rs6000, Fix header comment for intrinsic function _mm_movemask_epi8
    
    gcc/ChangeLog
    
    2020-04-30  Carl Love  <cel@us.ibm.com>
    
            * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.

Diff:
---
 gcc/ChangeLog                 | 4 ++++
 gcc/config/rs6000/emmintrin.h | 3 ++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c0d72cbbdf5..9598a49a702 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2020-04-30  Carl Love  <cel@us.ibm.com>
+
+	* config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
+
 2020-04-29  H.J. Lu  <hongjiu.lu@intel.com>
 
 	Backport from master
diff --git a/gcc/config/rs6000/emmintrin.h b/gcc/config/rs6000/emmintrin.h
index 30975090a2d..32c5fa0cb08 100644
--- a/gcc/config/rs6000/emmintrin.h
+++ b/gcc/config/rs6000/emmintrin.h
@@ -2033,7 +2033,8 @@ _mm_min_epu8 (__m128i __A, __m128i __B)
 #ifdef _ARCH_PWR8
 /* Intrinsic functions that require PowerISA 2.07 minimum.  */
 
-/* Creates a 4-bit mask from the most significant bits of the SPFP values.  */
+/* Return a mask created from the most significant bit of each 8-bit
+   element in A.  */
 extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm_movemask_epi8 (__m128i __A)
 {