[gcc(refs/vendors/AWS/heads/Arm64/gcc-7-branch)] re PR target/90724 (ICE with __sync_bool_compare_and_swap with -march=armv8.2-a+sve)

[Sebastian Pop]

https://gcc.gnu.org/g:57927b2e7e2aa9c7ae703a110cc86dfc40e7659c

commit 57927b2e7e2aa9c7ae703a110cc86dfc40e7659c
Author: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
Date:   Wed Aug 21 18:34:43 2019 +0000

    re PR target/90724 (ICE with __sync_bool_compare_and_swap with -march=armv8.2-a+sve)
    
    2019-08-21  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
    
    gcc/
            PR target/90724
            * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): Force y
            in reg if it fails aarch64_plus_operand predicate.
    
    (cherry picked from commit 846f78d414101dbd33ff9c370d379bae73ae0efa)

Diff:
---
 gcc/config/aarch64/aarch64.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index a0685a5ad41..9535d688ee5 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1248,6 +1248,9 @@ aarch64_gen_compare_reg_maybe_ze (RTX_CODE code, rtx x, rtx y,
 	}
     }
 
+  if (!aarch64_plus_operand (y, y_mode))
+    y = force_reg (y_mode, y);
+
   return aarch64_gen_compare_reg (code, x, y);
 }