[gcc r10-9096] [Obvious] arm: Fix test from failing on some targets [PR91816]
Stam Markianos-Wright
stammark@gcc.gnu.org
Mon Nov 30 10:42:59 GMT 2020
https://gcc.gnu.org/g:a2e6a3e1d9051a8a9ab6d2d11f012298457171a2
commit r10-9096-ga2e6a3e1d9051a8a9ab6d2d11f012298457171a2
Author: Stam Markianos-Wright <stam.markianos-wright@arm.com>
Date: Mon Nov 30 10:42:18 2020 +0000
[Obvious] arm: Fix test from failing on some targets [PR91816]
This recently submitted test was found to fail on some Cortex-M
targets. This was because codegen on these CPUs would emit a ldr
instead of a movw/movt pair, resulting in an overall smaller test
(i.e. the branch wasn't as far) and the behaviour being tested
for not being triggered.
This commit doubles the size of the test to account for this.
gcc/testsuite/ChangeLog:
* gcc.target/arm/pr91816.c: Update test.
Diff:
---
gcc/testsuite/gcc.target/arm/pr91816.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/pr91816.c b/gcc/testsuite/gcc.target/arm/pr91816.c
index b0a0ea1d495..f1269141690 100644
--- a/gcc/testsuite/gcc.target/arm/pr91816.c
+++ b/gcc/testsuite/gcc.target/arm/pr91816.c
@@ -11,6 +11,7 @@ int printf(const char *, ...);
#define HW3 HW2 HW2 HW2 HW2 HW2 HW2 HW2 HW2 HW2 HW2
#define HW4 HW3 HW3 HW3 HW3 HW3 HW3 HW3 HW3 HW3 HW3
#define HW5 HW4 HW4 HW4 HW4 HW4 HW4 HW4 HW4 HW4 HW4
+#define HW6 HW5 HW5
__attribute__((noinline,noclone)) void f1 (int a)
{
@@ -25,7 +26,7 @@ __attribute__((noinline,noclone)) void f2 (int a)
__attribute__((noinline,noclone)) void f3 (int a)
{
- if (a) { HW5 }
+ if (a) { HW6 }
}
__attribute__((noinline,noclone)) void f4 (int a)
@@ -41,7 +42,7 @@ __attribute__((noinline,noclone)) void f5 (int a)
__attribute__((noinline,noclone)) void f6 (int a)
{
- if (a == 1) { HW5 }
+ if (a == 1) { HW6 }
}
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