[gcc(refs/users/marxin/heads/marxin-gcc-benchmark-branch)] Fix release checking build of ARM.

Martin Liska marxin@gcc.gnu.org
Mon Mar 30 10:45:27 GMT 2020


https://gcc.gnu.org/g:9a4d502421c7469369d863226f03d197bfa2cb13

commit 9a4d502421c7469369d863226f03d197bfa2cb13
Author: Martin Liska <mliska@suse.cz>
Date:   Tue Feb 4 09:23:22 2020 +0100

    Fix release checking build of ARM.
    
            * config/arm/arm.c (arm_gen_far_branch): Move the function
            outside of selftests.

Diff:
---
 gcc/ChangeLog        |  5 +++++
 gcc/config/arm/arm.c | 41 ++++++++++++++++++++---------------------
 2 files changed, 25 insertions(+), 21 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 350f18d1161..59d606b8645 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2020-02-04  Martin Liska  <mliska@suse.cz>
+
+	* config/arm/arm.c (arm_gen_far_branch): Move the function
+	outside of selftests.
+
 2020-02-03  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index b5ae7e3e9ce..fe3bc675b42 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -33041,6 +33041,26 @@ arm_run_selftests (void)
 }
 } /* Namespace selftest.  */
 
+#undef TARGET_RUN_TARGET_SELFTESTS
+#define TARGET_RUN_TARGET_SELFTESTS selftest::arm_run_selftests
+#endif /* CHECKING_P */
+
+/* Worker function for TARGET_MD_ASM_ADJUST, while in thumb1 mode.
+   Unlike the arm version, we do NOT implement asm flag outputs.  */
+
+rtx_insn *
+thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
+		      vec<const char *> &constraints,
+		      vec<rtx> &/*clobbers*/, HARD_REG_SET &/*clobbered_regs*/)
+{
+  for (unsigned i = 0, n = outputs.length (); i < n; ++i)
+    if (strncmp (constraints[i], "=@cc", 4) == 0)
+      {
+	sorry ("asm flags not supported in thumb1 mode");
+	break;
+      }
+  return NULL;
+}
 
 /* Generate code to enable conditional branches in functions over 1 MiB.
    Parameters are:
@@ -33075,27 +33095,6 @@ arm_gen_far_branch (rtx * operands, int pos_label, const char * dest,
   return "";
 }
 
-#undef TARGET_RUN_TARGET_SELFTESTS
-#define TARGET_RUN_TARGET_SELFTESTS selftest::arm_run_selftests
-#endif /* CHECKING_P */
-
-/* Worker function for TARGET_MD_ASM_ADJUST, while in thumb1 mode.
-   Unlike the arm version, we do NOT implement asm flag outputs.  */
-
-rtx_insn *
-thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
-		      vec<const char *> &constraints,
-		      vec<rtx> &/*clobbers*/, HARD_REG_SET &/*clobbered_regs*/)
-{
-  for (unsigned i = 0, n = outputs.length (); i < n; ++i)
-    if (strncmp (constraints[i], "=@cc", 4) == 0)
-      {
-	sorry ("asm flags not supported in thumb1 mode");
-	break;
-      }
-  return NULL;
-}
-
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-arm.h"


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