[gcc(refs/vendors/ibm/heads/perf)] [testsuite] Fix PR93935 to guard case under vect_hw_misalign

[Jiu Fu Guo]

https://gcc.gnu.org/g:43d513af3f2026420312cc709dd729c81862de0c

commit 43d513af3f2026420312cc709dd729c81862de0c
Author: Kewen Lin <linkw@linux.ibm.com>
Date:   Fri Mar 13 05:51:21 2020 -0500

    [testsuite] Fix PR93935 to guard case under vect_hw_misalign
    
    This patch is to apply the same fix as r267528 to another similar case
    bb-slp-over-widen-2.c which requires misaligned vector access.
    
    gcc/testsuite/ChangeLog
    
        PR testsuite/93935
        * gcc.dg/vect/bb-slp-over-widen-2.c: Expect basic block vectorized
        messages only on vect_hw_misalign targets.

Diff:
---
 gcc/testsuite/ChangeLog                         | 6 ++++++
 gcc/testsuite/gcc.dg/vect/bb-slp-over-widen-2.c | 2 +-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5060981700a..4c6d7edda7e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2020-03-13  Kewen Lin  <linkw@gcc.gnu.org>
+
+	PR testsuite/93935
+	* gcc.dg/vect/bb-slp-over-widen-2.c: Expect basic block vectorized
+	messages only on vect_hw_misalign targets.
+
 2020-03-13  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR target/89229
diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-over-widen-2.c b/gcc/testsuite/gcc.dg/vect/bb-slp-over-widen-2.c
index 3750fb79c12..042b7e9ea1b 100644
--- a/gcc/testsuite/gcc.dg/vect/bb-slp-over-widen-2.c
+++ b/gcc/testsuite/gcc.dg/vect/bb-slp-over-widen-2.c
@@ -63,4 +63,4 @@ main (void)
 /* { dg-final { scan-tree-dump "demoting int to signed short" "slp2" { target { ! vect_widen_shift } } } } */
 /* { dg-final { scan-tree-dump "demoting int to unsigned short" "slp2" { target { ! vect_widen_shift } } } } */
 /* { dg-final { scan-tree-dump {\.AVG_FLOOR} "slp2" { target vect_avg_qi } } } */
-/* { dg-final { scan-tree-dump-times "basic block vectorized" 2 "slp2" } } */
+/* { dg-final { scan-tree-dump-times "basic block vectorized" 2 "slp2" { target vect_hw_misalign } } } */