[gcc(refs/vendors/ibm/heads/perf)] arc: Use accl_operand predicate for fma instructions.

[Jiu Fu Guo]

https://gcc.gnu.org/g:9c3044a210d69d475f76e4e269752e21ca4d3ac0

commit 9c3044a210d69d475f76e4e269752e21ca4d3ac0
Author: Claudiu Zissulescu <claziss@gmail.com>
Date:   Tue Mar 3 10:34:50 2020 +0200

    arc: Use accl_operand predicate for fma instructions.
    
    With the refurbish of ARC600' accumulator support, the mlo_operand
    doesn't reflect the proper low accumulator register for the newer
    ARCv2 accumulator register used by the fma instructions.  Hence,
    replace it with accl_operand predicate.
    
    gcc/
    xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>
    
            * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
            (fnmasf4_fpu): Likewise.

Diff:
---
 gcc/ChangeLog         | 5 +++++
 gcc/config/arc/fpu.md | 4 ++--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 383aa381129..25e90e9b5f4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
+	(fnmasf4_fpu): Likewise.
+
 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
 
 	* config/arc/arc.md (adddi3): Early expand the 64bit operation into
diff --git a/gcc/config/arc/fpu.md b/gcc/config/arc/fpu.md
index 6729795de54..14ebd865206 100644
--- a/gcc/config/arc/fpu.md
+++ b/gcc/config/arc/fpu.md
@@ -89,7 +89,7 @@
   [(set (match_operand:SF 0 "register_operand"          "=r,r,r,r,r")
 	(fma:SF (match_operand:SF 1 "nonmemory_operand" "%0,r,0,r,F")
 		(match_operand:SF 2 "nonmemory_operand"  "r,r,F,F,r")
-		(match_operand:SF 3 "mlo_operand" "")))]
+		(match_operand:SF 3 "accl_operand" "")))]
   "TARGET_FP_SP_FUSED
    && (register_operand (operands[1], SFmode)
        || register_operand (operands[2], SFmode))"
@@ -104,7 +104,7 @@
   [(set (match_operand:SF 0 "register_operand"                  "=r,r,r,r,r")
 	(fma:SF (neg:SF (match_operand:SF 1 "nonmemory_operand" "%0,r,0,r,F"))
 		(match_operand:SF 2 "nonmemory_operand"          "r,r,F,F,r")
-		(match_operand:SF 3 "mlo_operand" "")))]
+		(match_operand:SF 3 "accl_operand" "")))]
   "TARGET_FP_SP_FUSED
    && (register_operand (operands[1], SFmode)
        || register_operand (operands[2], SFmode))"