[gcc/devel/omp/gcc-9] Sanitize the constant argument for rotr<mode>3

Tobias Burnus burnus@gcc.gnu.org
Thu Mar 5 14:23:00 GMT 2020


https://gcc.gnu.org/g:b8449384f332b58a2d2f1e268afbfb25e8584339

commit b8449384f332b58a2d2f1e268afbfb25e8584339
Author: Dragan Mladjenovic <dmladjenovic@wavecomp.com>
Date:   Wed Nov 13 19:20:15 2019 +0000

    Sanitize the constant argument for rotr<mode>3
    
    This was dormant for quite some time, but it started happening for me
    on gcc.c-torture/compile/pr65153.c sometime after r276645 for -mabi=32 linux runs.
    
    The pattern accepts any SMALL_OPERAND constant value while it asserts during the final
    that the value is in the mode size range. I this case it happens that combine_and_move_insns
    during ira makes a pattern with negative "shift count" which fails at final stage.
    
    This simple fix just truncates the constant operand to mode size the same as shift patterns.
    
    gcc/ChangeLog:
    
    2019-11-13  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
    
    	Backport from mainline
    	* config/mips/mips.md (rotr<mode>3): Sanitize the constant argument
    	instead of asserting its value.
    
    From-SVN: r278154

Diff:
---
 gcc/ChangeLog           | 6 ++++++
 gcc/config/mips/mips.md | 4 ++--
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c0ef379..400e02f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-11-13  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+
+	Backport from mainline
+	* config/mips/mips.md (rotr<mode>3): Sanitize the constant argument
+	instead of asserting its value.
+
 2019-11-11  Richard Biener  <rguenther@suse.de>
 
 	Backport from mainline
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index a9b0c86..3cfb1a7 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -5836,8 +5836,8 @@
   "ISA_HAS_ROR"
 {
   if (CONST_INT_P (operands[2]))
-    gcc_assert (INTVAL (operands[2]) >= 0
-		&& INTVAL (operands[2]) < GET_MODE_BITSIZE (<MODE>mode));
+    operands[2] = GEN_INT (INTVAL (operands[2])
+                           & (GET_MODE_BITSIZE (<MODE>mode) - 1));
 
   return "<d>ror\t%0,%1,%2";
 }



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