[gcc/devel/omp/gcc-9] mips.c (mips_dwarf_frame_reg_mode): Replace TARGET_FLOAT64 with !TARGET_FLOAT32, thus handling both
Tobias Burnus
burnus@gcc.gnu.org
Thu Mar 5 13:51:00 GMT 2020
https://gcc.gnu.org/g:13d9be956e35dc47c47e69081f9f59c62567119c
commit 13d9be956e35dc47c47e69081f9f59c62567119c
Author: Jeff Law <law@redhat.com>
Date: Mon May 20 13:08:18 2019 -0600
mips.c (mips_dwarf_frame_reg_mode): Replace TARGET_FLOAT64 with !TARGET_FLOAT32, thus handling both fp64 and fpxx modes.
* config/mips/mips.c (mips_dwarf_frame_reg_mode): Replace
TARGET_FLOAT64 with !TARGET_FLOAT32, thus handling both fp64
and fpxx modes.
* g++.dg/eh/o32-fp.C: New.
* gcc.target/mips/dwarfregtable-1.c: New.
* gcc.target/mips/dwarfregtable-2.c: New.
* gcc.target/mips/dwarfregtable-3.c: New.
* gcc.target/mips/dwarfregtable-4.c: New.
* gcc.target/mips/dwarfregtable.h: New.
From-SVN: r271433
Diff:
---
gcc/ChangeLog | 9 +++++
gcc/config/mips/mips.c | 2 +-
gcc/testsuite/ChangeLog | 12 +++++++
gcc/testsuite/g++.dg/eh/o32-fp.C | 47 +++++++++++++++++++++++++
gcc/testsuite/gcc.target/mips/dwarfregtable-1.c | 5 +++
gcc/testsuite/gcc.target/mips/dwarfregtable-2.c | 5 +++
gcc/testsuite/gcc.target/mips/dwarfregtable-3.c | 5 +++
gcc/testsuite/gcc.target/mips/dwarfregtable-4.c | 5 +++
gcc/testsuite/gcc.target/mips/dwarfregtable.h | 22 ++++++++++++
9 files changed, 111 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a2c0e02..803d3a7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2019-05-20 Jeff Law <law@redhat.com>
+
+ Backported from mainline
+ 2019-05-17 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
+
+ * config/mips/mips.c (mips_dwarf_frame_reg_mode): Replace
+ TARGET_FLOAT64 with !TARGET_FLOAT32, thus handling both fp64
+ and fpxx modes.
+
2019-05-17 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 89fc073..2ba0850 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -9588,7 +9588,7 @@ mips_dwarf_frame_reg_mode (int regno)
{
machine_mode mode = default_dwarf_frame_reg_mode (regno);
- if (FP_REG_P (regno) && mips_abi == ABI_32 && TARGET_FLOAT64)
+ if (FP_REG_P (regno) && mips_abi == ABI_32 && !TARGET_FLOAT32)
mode = SImode;
return mode;
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ee9cb8d..5d89a5e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,15 @@
+2019-05-20 Jeff Law <law@redhat.com>
+
+ Backported from mainline
+ 2019-05-17 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
+
+ * g++.dg/eh/o32-fp.C: New.
+ * gcc.target/mips/dwarfregtable-1.c: New.
+ * gcc.target/mips/dwarfregtable-2.c: New.
+ * gcc.target/mips/dwarfregtable-3.c: New.
+ * gcc.target/mips/dwarfregtable-4.c: New.
+ * gcc.target/mips/dwarfregtable.h: New.
+
2019-05-20 Jonathan Wakely <jwakely@redhat.com>
Backported from mainline
diff --git a/gcc/testsuite/g++.dg/eh/o32-fp.C b/gcc/testsuite/g++.dg/eh/o32-fp.C
new file mode 100644
index 0000000..08fa51b
--- /dev/null
+++ b/gcc/testsuite/g++.dg/eh/o32-fp.C
@@ -0,0 +1,47 @@
+// Test whether call saved float are restored properly for O32 ABI
+// { dg-do run { target { { { mips*-*-linux* } && hard_float } && { ! mips64 } } } }
+// { dg-options "-O2" }
+
+void __attribute__((noinline))
+bar (void)
+{
+ throw 1;
+}
+
+void __attribute__((noinline))
+foo (void)
+{
+ register double f20 __asm__ ("f20") = 0.0;
+ register double f22 __asm__ ("f22") = 0.0;
+ register double f24 __asm__ ("f24") = 0.0;
+ register double f26 __asm__ ("f26") = 0.0;
+ register double f28 __asm__ ("f28") = 0.0;
+ register double f30 __asm__ ("f30") = 0.0;
+ __asm__ __volatile__("":"+f"(f20),"+f"(f22),"+f"(f24),"+f"(f26),"+f"(f30));
+ bar ();
+}
+
+int
+main (void)
+{
+ register double f20 __asm__ ("f20") = 12.0;
+ register double f22 __asm__ ("f22") = 13.0;
+ register double f24 __asm__ ("f24") = 14.0;
+ register double f26 __asm__ ("f26") = 15.0;
+ register double f28 __asm__ ("f28") = 16.0;
+ register double f30 __asm__ ("f30") = 17.0;
+
+ try
+ {
+ foo ();
+ }
+ catch (...)
+ {
+ __asm__ ("":"+f"(f20),"+f"(f22),"+f"(f24),"+f"(f26),"+f"(f30));
+ }
+
+ if (f20 != 12.0 || f22 != 13.0 || f24 != 14.0
+ || f26 != 15.0 || f28 != 16.0 || f30 != 17.0)
+ __builtin_abort ();
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/mips/dwarfregtable-1.c b/gcc/testsuite/gcc.target/mips/dwarfregtable-1.c
new file mode 100644
index 0000000..93d0844
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/dwarfregtable-1.c
@@ -0,0 +1,5 @@
+/* Check if content of dwarf reg size table matches the expected. */
+/* { dg-do run } */
+/* { dg-options "-mabi=32 -mfp32" } */
+
+#include "dwarfregtable.h"
diff --git a/gcc/testsuite/gcc.target/mips/dwarfregtable-2.c b/gcc/testsuite/gcc.target/mips/dwarfregtable-2.c
new file mode 100644
index 0000000..c6dea94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/dwarfregtable-2.c
@@ -0,0 +1,5 @@
+/* Check if content of dwarf reg size table matches the expected. */
+/* { dg-do run } */
+/* { dg-options "-mabi=32 -mfpxx" } */
+
+#include "dwarfregtable.h"
diff --git a/gcc/testsuite/gcc.target/mips/dwarfregtable-3.c b/gcc/testsuite/gcc.target/mips/dwarfregtable-3.c
new file mode 100644
index 0000000..87937c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/dwarfregtable-3.c
@@ -0,0 +1,5 @@
+/* Check if content of dwarf reg size table matches the expected. */
+/* { dg-do run } */
+/* { dg-options "-mabi=32 -mfp64" } */
+
+#include "dwarfregtable.h"
diff --git a/gcc/testsuite/gcc.target/mips/dwarfregtable-4.c b/gcc/testsuite/gcc.target/mips/dwarfregtable-4.c
new file mode 100644
index 0000000..2dd6dea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/dwarfregtable-4.c
@@ -0,0 +1,5 @@
+/* Check if content of dwarf reg size table matches the expected. */
+/* { dg-do run } */
+/* { dg-options "-mabi=32 -mfp64 -modd-spreg" } */
+
+#include "dwarfregtable.h"
diff --git a/gcc/testsuite/gcc.target/mips/dwarfregtable.h b/gcc/testsuite/gcc.target/mips/dwarfregtable.h
new file mode 100644
index 0000000..403f65f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/dwarfregtable.h
@@ -0,0 +1,22 @@
+
+typedef unsigned Unwind_Word __attribute__((__mode__(__unwind_word__)));
+
+#define DWARF_FRAME_REGISTERS 188
+
+static unsigned char ref_dwarf_reg_size_table[DWARF_FRAME_REGISTERS + 1] =
+ {
+ [0 ... 66] = sizeof (Unwind_Word),
+ [80 ... 181] = sizeof (Unwind_Word)
+ };
+
+static unsigned char dwarf_reg_size_table[DWARF_FRAME_REGISTERS + 1] = {};
+
+int
+main (void)
+{
+ __builtin_init_dwarf_reg_size_table (dwarf_reg_size_table);
+ if (__builtin_memcmp (ref_dwarf_reg_size_table,
+ dwarf_reg_size_table, DWARF_FRAME_REGISTERS + 1) != 0)
+ __builtin_abort ();
+ return 0;
+}
More information about the Gcc-cvs
mailing list