[gcc(refs/users/meissner/heads/work003)] PowerPC: Restrict PR target/81594 to just V2DImode.
Michael Meissner
meissner@gcc.gnu.org
Tue Jun 9 13:45:54 GMT 2020
https://gcc.gnu.org/g:c4392c717f05bb28ff5aff858e70fc45a6e31eb7
commit c4392c717f05bb28ff5aff858e70fc45a6e31eb7
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Tue Jun 9 09:45:17 2020 -0400
PowerPC: Restrict PR target/81594 to just V2DImode.
gcc/
2020-06-09 Michael Meissner <meissner@linux.ibm.com>
PR target/81594
* config/rs6000/vsx.md (concatv2di_store): Only do the
optimization for V2DImode.
(dupv2di_store): Likewise.
testsuite/
2020-06-09 Michael Meissner <meissner@linux.ibm.com>
PR target/81594
* gcc.target/powerpc/pr81594.c: Delete the V2DF tests.
Diff:
---
gcc/config/rs6000/vsx.md | 34 +++++++++++++++-------------
gcc/testsuite/gcc.target/powerpc/pr81594.c | 36 ------------------------------
2 files changed, 18 insertions(+), 52 deletions(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 44beb475ef8..e5816b63cbd 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -2879,12 +2879,14 @@
[(set_attr "type" "vecperm")])
;; If the only use for a VEC_CONCAT is to store 2 64-bit values, replace it
-;; with two stores.
-(define_insn_and_split "*concat<mode>_store"
- [(set (match_operand:VSX_D 0 "memory_operand" "=m,m,m,m")
- (vec_concat:VSX_D
- (match_operand:<VS_scalar> 1 "gpc_reg_operand" "r,wa,r,wa")
- (match_operand:<VS_scalar> 2 "gpc_reg_operand" "r,wa,wa,r")))
+;; with two stores. Only do DImode, since it saves doing 1 direct move on
+;; power9, and 2 direct moves + XXPERMDI on power8. Typically DFmode would
+;; just be a XXPERMDI/STX.
+(define_insn_and_split "*concatv2di_store"
+ [(set (match_operand:V2DI 0 "memory_operand" "=m,m,m,m")
+ (vec_concat:V2DI
+ (match_operand:DI 1 "gpc_reg_operand" "r,wa,r,wa")
+ (match_operand:DI 2 "gpc_reg_operand" "r,wa,wa,r")))
(clobber (match_scratch:DI 3 "=&b,&b,&b,&b"))]
"TARGET_DIRECT_MOVE_64BIT"
"#"
@@ -2898,7 +2900,7 @@
/* If the address can't be used directly for both stores, copy it to the
temporary base register. */
- if (!ds_form_memory (mem, <MODE>mode))
+ if (!ds_form_memory (mem, V2DImode))
{
rtx old_addr = XEXP (mem, 0);
rtx new_addr = operands[3];
@@ -2912,19 +2914,19 @@
/* Because we are creating scalar stores, we don't have to swap the order
of the elements and then swap the stores to get the right order on
little endian systems. */
- operands[4] = adjust_address (mem, <VS_scalar>mode, 0);
+ operands[4] = adjust_address (mem, DImode, 0);
operands[5] = operands[1];
- operands[6] = adjust_address (mem, <VS_scalar>mode, 8);
+ operands[6] = adjust_address (mem, DImode, 8);
operands[7] = operands[2];
}
[(set_attr "length" "8")
(set_attr "type" "store,fpstore,fpstore,store")])
;; Optimize creating a vector with 2 duplicate elements and storing it.
-(define_insn_and_split "*dup<mode>_store"
- [(set (match_operand:VSX_D 0 "memory_operand" "=m,m")
- (vec_duplicate:VSX_D
- (match_operand:<VS_scalar> 1 "gpc_reg_operand" "r,wa")))
+(define_insn_and_split "*dupv2di_store"
+ [(set (match_operand:V2DI 0 "memory_operand" "=m,m")
+ (vec_duplicate:V2DI
+ (match_operand:DI 1 "gpc_reg_operand" "r,wa")))
(clobber (match_scratch:DI 2 "=&b,&b"))]
"TARGET_DIRECT_MOVE_64BIT"
"#"
@@ -2938,7 +2940,7 @@
/* If the address can't be used directly for both stores, copy it to the
temporary base register. */
- if (!ds_form_memory (mem, <MODE>mode))
+ if (!ds_form_memory (mem, V2DImode))
{
rtx old_addr = XEXP (mem, 0);
rtx new_addr = operands[2];
@@ -2949,8 +2951,8 @@
mem = change_address (mem, VOIDmode, new_addr);
}
- operands[3] = adjust_address (mem, <VS_scalar>mode, 0);
- operands[4] = adjust_address (mem, <VS_scalar>mode, 8);
+ operands[3] = adjust_address (mem, DImode, 0);
+ operands[4] = adjust_address (mem, DImode, 8);
}
[(set_attr "length" "8")
(set_attr "type" "store,fpstore")])
diff --git a/gcc/testsuite/gcc.target/powerpc/pr81594.c b/gcc/testsuite/gcc.target/powerpc/pr81594.c
index 469ceb575dd..be7bb722185 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr81594.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr81594.c
@@ -29,30 +29,6 @@ store_v2di_splat_8 (vector unsigned long *p, unsigned long a)
p[8] = (vector unsigned long) { a, a };
}
-void
-store_v2df_0 (vector double *p, double a, double b)
-{
- *p = (vector double) { a, b };
-}
-
-void
-store_v2df_4 (vector double *p, double a, double b)
-{
- p[4] = (vector double) { a, b };
-}
-
-void
-store_v2df_splat_0 (vector double *p, double a)
-{
- *p = (vector double) { a, a };
-}
-
-void
-store_v2df_splat_8 (vector double *p, double a)
-{
- p[8] = (vector double) { a, a };
-}
-
/* 2047 is the largest index that can be used with DS-form instructions. */
void
store_v2di_2047 (vector unsigned long *p, unsigned long a, unsigned long b)
@@ -60,12 +36,6 @@ store_v2di_2047 (vector unsigned long *p, unsigned long a, unsigned long b)
p[2047] = (vector unsigned long) { a, b };
}
-void
-store_v2df_2047 (vector double *p, double a, double b)
-{
- p[2047] = (vector double) { a, b };
-}
-
/* 2048 will require the constant to be loaded because we can't use a pair of
DS-form instructions. If we have prefixed addressing, a prefixed form will
be generated instead. Two separate stores should still be issued. */
@@ -75,12 +45,6 @@ store_v2di_2048 (vector unsigned long *p, unsigned long a, unsigned long b)
p[2048] = (vector unsigned long) { a, b };
}
-void
-store_v2df_2048 (vector double *p, double a, double b)
-{
- p[2048] = (vector double) { a, b };
-}
-
/* { dg-final { scan-assembler-not {\mstxv\M} } } */
/* { dg-final { scan-assembler-not {\mstxvx\M} } } */
/* { dg-final { scan-assembler-not {\mmfvsrd\M} } } */
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