[gcc(refs/users/marxin/heads/vect_cond_expr-rework-v6)] Fix 92085-2.c ICE due to having (const_int 0) as the destination of a set.

[Martin Liska]

https://gcc.gnu.org/g:c7969df1c5d3785c0b409f97e7682a6f0d2637ec

commit c7969df1c5d3785c0b409f97e7682a6f0d2637ec
Author: Jeff Law <law@torsion.usersys.redhat.com>
Date:   Mon Jun 1 17:14:50 2020 -0400

    Fix 92085-2.c ICE due to having (const_int 0) as the destination of a set.
    
    gcc/
            * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
            returns (const_int 0) for the destination, then emit nothing.

Diff:
---
 gcc/lower-subreg.c | 21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/gcc/lower-subreg.c b/gcc/lower-subreg.c
index a11e535b5bf..abe7180c686 100644
--- a/gcc/lower-subreg.c
+++ b/gcc/lower-subreg.c
@@ -1087,12 +1087,21 @@ resolve_simple_move (rtx set, rtx_insn *insn)
 	emit_clobber (dest);
 
       for (i = 0; i < words; ++i)
-	emit_move_insn (simplify_gen_subreg_concatn (word_mode, dest,
-						     dest_mode,
-						     i * UNITS_PER_WORD),
-			simplify_gen_subreg_concatn (word_mode, src,
-						     orig_mode,
-						     i * UNITS_PER_WORD));
+	{
+	  rtx t = simplify_gen_subreg_concatn (word_mode, dest,
+					       dest_mode,
+					       i * UNITS_PER_WORD);
+	  /* simplify_gen_subreg_concatn can return (const_int 0) for
+	     some sub-objects of paradoxical subregs.  As a source operand,
+	     that's fine.  As a destination it must be avoided.  Those are
+	     supposed to be don't care bits, so we can just drop that store
+	     on the floor.  */
+	  if (t != CONST0_RTX (word_mode))
+	    emit_move_insn (t,
+			    simplify_gen_subreg_concatn (word_mode, src,
+							 orig_mode,
+							 i * UNITS_PER_WORD));
+	}
     }
 
   if (real_dest != NULL_RTX)