[gcc(refs/vendors/ARM/heads/arm-perf-staging)] x86: Update VPCLMULQDQ check

[Tamar Christina]

https://gcc.gnu.org/g:efcf41fcfa7351f2e941075d2f1fd73cc282de5b

commit efcf41fcfa7351f2e941075d2f1fd73cc282de5b
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue May 19 18:55:08 2020 -0700

    x86: Update VPCLMULQDQ check
    
    Update VPCLMULQDQ check to support processors with AVX version of
    VPCLMULQDQ.
    
            Backport from master
            PR target/91695
            * config/i386/cpuinfo.c (get_available_features): Fix VPCLMULQDQ
            check.
    
    (cherry picked from commit 1e46a443f25d26816536c0c480211714b123a1d5)

Diff:
---
 libgcc/ChangeLog             | 9 +++++++++
 libgcc/config/i386/cpuinfo.c | 4 ++--
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index c573beffba0..90955415ee4 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,12 @@
+2020-05-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	Backport from master
+	2020-05-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/91695
+	* config/i386/cpuinfo.c (get_available_features): Fix VPCLMULQDQ
+	check.
+
 2020-05-19  H.J. Lu  <hongjiu.lu@intel.com>
 
 	Backport from master
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index 26c1bdca361..cf5f0884bb4 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -346,6 +346,8 @@ get_available_features (unsigned int ecx, unsigned int edx,
 	{
 	  if (ebx & bit_AVX2)
 	    set_feature (FEATURE_AVX2);
+	  if (ecx & bit_VPCLMULQDQ)
+	    set_feature (FEATURE_VPCLMULQDQ);
 	}
       if (ebx & bit_BMI2)
 	set_feature (FEATURE_BMI2);
@@ -373,8 +375,6 @@ get_available_features (unsigned int ecx, unsigned int edx,
 	    set_feature (FEATURE_AVX512VBMI);
 	  if (ecx & bit_AVX512VBMI2)
 	    set_feature (FEATURE_AVX512VBMI2);
-	  if (ecx & bit_VPCLMULQDQ)
-	    set_feature (FEATURE_VPCLMULQDQ);
 	  if (ecx & bit_AVX512VNNI)
 	    set_feature (FEATURE_AVX512VNNI);
 	  if (ecx & bit_AVX512BITALG)