[gcc(refs/vendors/ARM/heads/arm-perf-staging)] Intrinsic macro of vpshr* and vpshl* lack a closing parenthesis which would cause failure in O0.
Tamar Christina
tnfchris@gcc.gnu.org
Fri Jul 17 13:04:48 GMT 2020
https://gcc.gnu.org/g:cf1db5c9a342352d66164fea8c4ea0a540627024
commit cf1db5c9a342352d66164fea8c4ea0a540627024
Author: liuhongt <hongtao.liu@intel.com>
Date: Wed Feb 12 18:04:42 2020 +0800
Intrinsic macro of vpshr* and vpshl* lack a closing parenthesis which would cause failure in O0.
2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
gcc/
PR target/93724
* config/i386/avx512vbmi2intrin.h
(_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
_mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
_mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
_m512_shrdi_epi64, _m512_mask_shrdi_epi64,
_m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
_mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
_mm512_shldi_epi32, _mm512_mask_shldi_epi32,
_mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
_mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
of lacking a closing parenthesis.
* config/i386/avx512vbmi2vlintrin.h
(_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
_mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
_mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
_m256_shrdi_epi64, _m256_mask_shrdi_epi64,
_m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
_mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
_mm256_shldi_epi32, _mm256_mask_shldi_epi32,
_mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
_mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
_mm_shrdi_epi16, _mm_mask_shrdi_epi16,
_mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
_mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
_mm_shrdi_epi64, _mm_mask_shrdi_epi64,
_m_maskz_shrdi_epi64, _mm_shldi_epi16,
_mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
_mm_shldi_epi32, _mm_mask_shldi_epi32,
_mm_maskz_shldi_epi32, _mm_shldi_epi64,
_mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
gcc/testsuite/
* gcc.target/i386/avx512vbmi2-vpshld-1.c: New test.
* gcc.target/i386/avx512vbmi2-vpshrd-1.c: Ditto.
* gcc.target/i386/sse-12.c: Add -mavx512vbmi2.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Add -mavx512vbmi2 and tests.
* gcc.target/i386/sse-22.c: Ditto.
Diff:
---
gcc/config/i386/avx512vbmi2intrin.h | 90 +++++++----
gcc/config/i386/avx512vbmi2vlintrin.h | 173 +++++++++++++--------
.../gcc.target/i386/avx512vbmi2-vpshld-1.c | 34 ++++
.../gcc.target/i386/avx512vbmi2-vpshrd-1.c | 34 ++++
gcc/testsuite/gcc.target/i386/sse-12.c | 2 +-
gcc/testsuite/gcc.target/i386/sse-13.c | 2 +-
gcc/testsuite/gcc.target/i386/sse-14.c | 56 ++++++-
gcc/testsuite/gcc.target/i386/sse-22.c | 58 ++++++-
8 files changed, 352 insertions(+), 97 deletions(-)
diff --git a/gcc/config/i386/avx512vbmi2intrin.h b/gcc/config/i386/avx512vbmi2intrin.h
index 93632dc80a8..5114d4d79f5 100644
--- a/gcc/config/i386/avx512vbmi2intrin.h
+++ b/gcc/config/i386/avx512vbmi2intrin.h
@@ -151,50 +151,68 @@ _mm512_maskz_shldi_epi64 (__mmask8 __A, __m512i __B, __m512i __C, int __D)
#else
#define _mm512_shrdi_epi16(A, B, C) \
((__m512i) __builtin_ia32_vpshrd_v32hi ((__v32hi)(__m512i)(A), \
- (__v32hi)(__m512i)(B),(int)(C))
+ (__v32hi)(__m512i)(B),(int)(C)))
#define _mm512_shrdi_epi32(A, B, C) \
((__m512i) __builtin_ia32_vpshrd_v16si ((__v16si)(__m512i)(A), \
- (__v16si)(__m512i)(B),(int)(C))
+ (__v16si)(__m512i)(B),(int)(C)))
#define _mm512_mask_shrdi_epi32(A, B, C, D, E) \
((__m512i) __builtin_ia32_vpshrd_v16si_mask ((__v16si)(__m512i)(C), \
- (__v16si)(__m512i)(D), (int)(E), (__v16si)(__m512i)(A),(__mmask16)(B))
+ (__v16si)(__m512i)(D), \
+ (int)(E), \
+ (__v16si)(__m512i)(A), \
+ (__mmask16)(B)))
#define _mm512_maskz_shrdi_epi32(A, B, C, D) \
- ((__m512i) __builtin_ia32_vpshrd_v16si_mask ((__v16si)(__m512i)(B), \
- (__v16si)(__m512i)(C),(int)(D), \
- (__v16si)(__m512i)_mm512_setzero_si512 (), (__mmask16)(A))
+ ((__m512i) \
+ __builtin_ia32_vpshrd_v16si_mask ((__v16si)(__m512i)(B), \
+ (__v16si)(__m512i)(C),(int)(D), \
+ (__v16si)(__m512i)_mm512_setzero_si512 (), \
+ (__mmask16)(A)))
#define _mm512_shrdi_epi64(A, B, C) \
((__m512i) __builtin_ia32_vpshrd_v8di ((__v8di)(__m512i)(A), \
- (__v8di)(__m512i)(B),(int)(C))
+ (__v8di)(__m512i)(B),(int)(C)))
#define _mm512_mask_shrdi_epi64(A, B, C, D, E) \
((__m512i) __builtin_ia32_vpshrd_v8di_mask ((__v8di)(__m512i)(C), \
- (__v8di)(__m512i)(D), (int)(E), (__v8di)(__m512i)(A),(__mmask8)(B))
+ (__v8di)(__m512i)(D), (int)(E), \
+ (__v8di)(__m512i)(A), \
+ (__mmask8)(B)))
#define _mm512_maskz_shrdi_epi64(A, B, C, D) \
- ((__m512i) __builtin_ia32_vpshrd_v8di_mask ((__v8di)(__m512i)(B), \
- (__v8di)(__m512i)(C),(int)(D), \
- (__v8di)(__m512i)_mm512_setzero_si512 (), (__mmask8)(A))
+ ((__m512i) \
+ __builtin_ia32_vpshrd_v8di_mask ((__v8di)(__m512i)(B), \
+ (__v8di)(__m512i)(C),(int)(D), \
+ (__v8di)(__m512i)_mm512_setzero_si512 (), \
+ (__mmask8)(A)))
#define _mm512_shldi_epi16(A, B, C) \
((__m512i) __builtin_ia32_vpshld_v32hi ((__v32hi)(__m512i)(A), \
- (__v32hi)(__m512i)(B),(int)(C))
+ (__v32hi)(__m512i)(B),(int)(C)))
#define _mm512_shldi_epi32(A, B, C) \
- ((__m512i) __builtin_ia32_vpshld_v16si ((__v16si)(__m512i)(A), \
- (__v16si)(__m512i)(B),(int)(C))
+ ((__m512i) __builtin_ia32_vpshld_v16si ((__v16si)(__m512i)(A), \
+ (__v16si)(__m512i)(B),(int)(C)))
#define _mm512_mask_shldi_epi32(A, B, C, D, E) \
((__m512i) __builtin_ia32_vpshld_v16si_mask ((__v16si)(__m512i)(C), \
- (__v16si)(__m512i)(D), (int)(E), (__v16si)(__m512i)(A),(__mmask16)(B))
+ (__v16si)(__m512i)(D), \
+ (int)(E), \
+ (__v16si)(__m512i)(A), \
+ (__mmask16)(B)))
#define _mm512_maskz_shldi_epi32(A, B, C, D) \
- ((__m512i) __builtin_ia32_vpshld_v16si_mask ((__v16si)(__m512i)(B), \
- (__v16si)(__m512i)(C),(int)(D), \
- (__v16si)(__m512i)_mm512_setzero_si512 (), (__mmask16)(A))
+ ((__m512i) \
+ __builtin_ia32_vpshld_v16si_mask ((__v16si)(__m512i)(B), \
+ (__v16si)(__m512i)(C),(int)(D), \
+ (__v16si)(__m512i)_mm512_setzero_si512 (), \
+ (__mmask16)(A)))
#define _mm512_shldi_epi64(A, B, C) \
((__m512i) __builtin_ia32_vpshld_v8di ((__v8di)(__m512i)(A), \
- (__v8di)(__m512i)(B),(int)(C))
+ (__v8di)(__m512i)(B), (int)(C)))
#define _mm512_mask_shldi_epi64(A, B, C, D, E) \
((__m512i) __builtin_ia32_vpshld_v8di_mask ((__v8di)(__m512i)(C), \
- (__v8di)(__m512i)(D), (int)(E), (__v8di)(__m512i)(A),(__mmask8)(B))
+ (__v8di)(__m512i)(D), (int)(E), \
+ (__v8di)(__m512i)(A), \
+ (__mmask8)(B)))
#define _mm512_maskz_shldi_epi64(A, B, C, D) \
- ((__m512i) __builtin_ia32_vpshld_v8di_mask ((__v8di)(__m512i)(B), \
- (__v8di)(__m512i)(C),(int)(D), \
- (__v8di)(__m512i)_mm512_setzero_si512 (), (__mmask8)(A))
+ ((__m512i) \
+ __builtin_ia32_vpshld_v8di_mask ((__v8di)(__m512i)(B), \
+ (__v8di)(__m512i)(C),(int)(D), \
+ (__v8di)(__m512i)_mm512_setzero_si512 (), \
+ (__mmask8)(A)))
#endif
extern __inline __m512i
@@ -474,18 +492,28 @@ _mm512_maskz_shldi_epi16 (__mmask32 __A, __m512i __B, __m512i __C, int __D)
#else
#define _mm512_mask_shrdi_epi16(A, B, C, D, E) \
((__m512i) __builtin_ia32_vpshrd_v32hi_mask ((__v32hi)(__m512i)(C), \
- (__v32hi)(__m512i)(D), (int)(E), (__v32hi)(__m512i)(A),(__mmask32)(B))
+ (__v32hi)(__m512i)(D), \
+ (int)(E), \
+ (__v32hi)(__m512i)(A), \
+ (__mmask32)(B)))
#define _mm512_maskz_shrdi_epi16(A, B, C, D) \
- ((__m512i) __builtin_ia32_vpshrd_v32hi_mask ((__v32hi)(__m512i)(B), \
- (__v32hi)(__m512i)(C),(int)(D), \
- (__v32hi)(__m512i)_mm512_setzero_si512 (), (__mmask32)(A))
+ ((__m512i) \
+ __builtin_ia32_vpshrd_v32hi_mask ((__v32hi)(__m512i)(B), \
+ (__v32hi)(__m512i)(C),(int)(D), \
+ (__v32hi)(__m512i)_mm512_setzero_si512 (), \
+ (__mmask32)(A)))
#define _mm512_mask_shldi_epi16(A, B, C, D, E) \
((__m512i) __builtin_ia32_vpshld_v32hi_mask ((__v32hi)(__m512i)(C), \
- (__v32hi)(__m512i)(D), (int)(E), (__v32hi)(__m512i)(A),(__mmask32)(B))
+ (__v32hi)(__m512i)(D), \
+ (int)(E), \
+ (__v32hi)(__m512i)(A), \
+ (__mmask32)(B)))
#define _mm512_maskz_shldi_epi16(A, B, C, D) \
- ((__m512i) __builtin_ia32_vpshld_v32hi_mask ((__v32hi)(__m512i)(B), \
- (__v32hi)(__m512i)(C),(int)(D), \
- (__v32hi)(__m512i)_mm512_setzero_si512 (), (__mmask32)(A))
+ ((__m512i) \
+ __builtin_ia32_vpshld_v32hi_mask ((__v32hi)(__m512i)(B), \
+ (__v32hi)(__m512i)(C),(int)(D), \
+ (__v32hi)(__m512i)_mm512_setzero_si512 (), \
+ (__mmask32)(A)))
#endif
extern __inline __m512i
diff --git a/gcc/config/i386/avx512vbmi2vlintrin.h b/gcc/config/i386/avx512vbmi2vlintrin.h
index 1cf0cf6c761..3ab44ae4d41 100644
--- a/gcc/config/i386/avx512vbmi2vlintrin.h
+++ b/gcc/config/i386/avx512vbmi2vlintrin.h
@@ -498,124 +498,175 @@ _mm_shldi_epi64 (__m128i __A, __m128i __B, int __C)
#else
#define _mm256_shrdi_epi16(A, B, C) \
((__m256i) __builtin_ia32_vpshrd_v16hi ((__v16hi)(__m256i)(A), \
- (__v16hi)(__m256i)(B),(int)(C))
+ (__v16hi)(__m256i)(B),(int)(C)))
#define _mm256_mask_shrdi_epi16(A, B, C, D, E) \
((__m256i) __builtin_ia32_vpshrd_v16hi_mask ((__v16hi)(__m256i)(C), \
- (__v16hi)(__m256i)(D), (int)(E), (__v16hi)(__m256i)(A),(__mmask16)(B))
+ (__v16hi)(__m256i)(D), \
+ (int)(E), \
+ (__v16hi)(__m256i)(A), \
+ (__mmask16)(B)))
#define _mm256_maskz_shrdi_epi16(A, B, C, D) \
- ((__m256i) __builtin_ia32_vpshrd_v16hi_mask ((__v16hi)(__m256i)(B), \
- (__v16hi)(__m256i)(C),(int)(D), \
- (__v16hi)(__m256i)_mm256_setzero_si256 (), (__mmask16)(A))
+ ((__m256i) \
+ __builtin_ia32_vpshrd_v16hi_mask ((__v16hi)(__m256i)(B), \
+ (__v16hi)(__m256i)(C),(int)(D), \
+ (__v16hi)(__m256i)_mm256_setzero_si256 (), \
+ (__mmask16)(A)))
#define _mm256_shrdi_epi32(A, B, C) \
((__m256i) __builtin_ia32_vpshrd_v8si ((__v8si)(__m256i)(A), \
- (__v8si)(__m256i)(B),(int)(C))
+ (__v8si)(__m256i)(B),(int)(C)))
#define _mm256_mask_shrdi_epi32(A, B, C, D, E) \
((__m256i) __builtin_ia32_vpshrd_v8si_mask ((__v8si)(__m256i)(C), \
- (__v8si)(__m256i)(D), (int)(E), (__v8si)(__m256i)(A),(__mmask8)(B))
+ (__v8si)(__m256i)(D), \
+ (int)(E), \
+ (__v8si)(__m256i)(A), \
+ (__mmask8)(B)))
#define _mm256_maskz_shrdi_epi32(A, B, C, D) \
- ((__m256i) __builtin_ia32_vpshrd_v8si_mask ((__v8si)(__m256i)(B), \
- (__v8si)(__m256i)(C),(int)(D), \
- (__v8si)(__m256i)_mm256_setzero_si256 (), (__mmask8)(A))
+ ((__m256i) \
+ __builtin_ia32_vpshrd_v8si_mask ((__v8si)(__m256i)(B), \
+ (__v8si)(__m256i)(C),(int)(D), \
+ (__v8si)(__m256i)_mm256_setzero_si256 (), \
+ (__mmask8)(A)))
#define _mm256_shrdi_epi64(A, B, C) \
((__m256i) __builtin_ia32_vpshrd_v4di ((__v4di)(__m256i)(A), \
- (__v4di)(__m256i)(B),(int)(C))
+ (__v4di)(__m256i)(B),(int)(C)))
#define _mm256_mask_shrdi_epi64(A, B, C, D, E) \
((__m256i) __builtin_ia32_vpshrd_v4di_mask ((__v4di)(__m256i)(C), \
- (__v4di)(__m256i)(D), (int)(E), (__v4di)(__m256i)(A),(__mmask8)(B))
+ (__v4di)(__m256i)(D), (int)(E), \
+ (__v4di)(__m256i)(A), \
+ (__mmask8)(B)))
#define _mm256_maskz_shrdi_epi64(A, B, C, D) \
- ((__m256i) __builtin_ia32_vpshrd_v4di_mask ((__v4di)(__m256i)(B), \
- (__v4di)(__m256i)(C),(int)(D), \
- (__v4di)(__m256i)_mm256_setzero_si256 (), (__mmask8)(A))
+ ((__m256i) \
+ __builtin_ia32_vpshrd_v4di_mask ((__v4di)(__m256i)(B), \
+ (__v4di)(__m256i)(C),(int)(D), \
+ (__v4di)(__m256i)_mm256_setzero_si256 (), \
+ (__mmask8)(A)))
#define _mm_shrdi_epi16(A, B, C) \
((__m128i) __builtin_ia32_vpshrd_v8hi ((__v8hi)(__m128i)(A), \
- (__v8hi)(__m128i)(B),(int)(C))
+ (__v8hi)(__m128i)(B),(int)(C)))
#define _mm_mask_shrdi_epi16(A, B, C, D, E) \
((__m128i) __builtin_ia32_vpshrd_v8hi_mask ((__v8hi)(__m128i)(C), \
- (__v8hi)(__m128i)(D), (int)(E), (__v8hi)(__m128i)(A),(__mmask8)(B))
+ (__v8hi)(__m128i)(D), (int)(E), \
+ (__v8hi)(__m128i)(A), \
+ (__mmask8)(B)))
#define _mm_maskz_shrdi_epi16(A, B, C, D) \
- ((__m128i) __builtin_ia32_vpshrd_v8hi_mask ((__v8hi)(__m128i)(B), \
- (__v8hi)(__m128i)(C),(int)(D), \
- (__v8hi)(__m128i)_mm_setzero_si128 (), (__mmask8)(A))
+ ((__m128i) \
+ __builtin_ia32_vpshrd_v8hi_mask ((__v8hi)(__m128i)(B), \
+ (__v8hi)(__m128i)(C),(int)(D), \
+ (__v8hi)(__m128i)_mm_setzero_si128 (), \
+ (__mmask8)(A)))
#define _mm_shrdi_epi32(A, B, C) \
((__m128i) __builtin_ia32_vpshrd_v4si ((__v4si)(__m128i)(A), \
- (__v4si)(__m128i)(B),(int)(C))
+ (__v4si)(__m128i)(B),(int)(C)))
#define _mm_mask_shrdi_epi32(A, B, C, D, E) \
- ((__m128i) __builtin_ia32_vpshrd_v4si_mask ((__v4si)(__m128i)(C), \
- (__v4si)(__m128i)(D), (int)(E), (__v4si)(__m128i)(A),(__mmask8)(B))
+ ((__m128i) __builtin_ia32_vpshrd_v4si_mask ((__v4si)(__m128i)(C), \
+ (__v4si)(__m128i)(D), (int)(E), \
+ (__v4si)(__m128i)(A), \
+ (__mmask8)(B)))
#define _mm_maskz_shrdi_epi32(A, B, C, D) \
- ((__m128i) __builtin_ia32_vpshrd_v4si_mask ((__v4si)(__m128i)(B), \
- (__v4si)(__m128i)(C),(int)(D), \
- (__v4si)(__m128i)_mm_setzero_si128 (), (__mmask8)(A))
+ ((__m128i) \
+ __builtin_ia32_vpshrd_v4si_mask ((__v4si)(__m128i)(B), \
+ (__v4si)(__m128i)(C),(int)(D), \
+ (__v4si)(__m128i)_mm_setzero_si128 (), \
+ (__mmask8)(A)))
#define _mm_shrdi_epi64(A, B, C) \
((__m128i) __builtin_ia32_vpshrd_v2di ((__v2di)(__m128i)(A), \
- (__v2di)(__m128i)(B),(int)(C))
+ (__v2di)(__m128i)(B),(int)(C)))
#define _mm_mask_shrdi_epi64(A, B, C, D, E) \
((__m128i) __builtin_ia32_vpshrd_v2di_mask ((__v2di)(__m128i)(C), \
- (__v2di)(__m128i)(D), (int)(E), (__v2di)(__m128i)(A),(__mmask8)(B))
+ (__v2di)(__m128i)(D), (int)(E), \
+ (__v2di)(__m128i)(A), \
+ (__mmask8)(B)))
#define _mm_maskz_shrdi_epi64(A, B, C, D) \
- ((__m128i) __builtin_ia32_vpshrd_v2di_mask ((__v2di)(__m128i)(B), \
- (__v2di)(__m128i)(C),(int)(D), \
- (__v2di)(__m128i)_mm_setzero_si128 (), (__mmask8)(A))
+ ((__m128i) \
+ __builtin_ia32_vpshrd_v2di_mask ((__v2di)(__m128i)(B), \
+ (__v2di)(__m128i)(C),(int)(D), \
+ (__v2di)(__m128i)_mm_setzero_si128 (), \
+ (__mmask8)(A)))
#define _mm256_shldi_epi16(A, B, C) \
((__m256i) __builtin_ia32_vpshld_v16hi ((__v16hi)(__m256i)(A), \
- (__v16hi)(__m256i)(B),(int)(C))
+ (__v16hi)(__m256i)(B),(int)(C)))
#define _mm256_mask_shldi_epi16(A, B, C, D, E) \
((__m256i) __builtin_ia32_vpshld_v16hi_mask ((__v16hi)(__m256i)(C), \
- (__v16hi)(__m256i)(D), (int)(E), (__v16hi)(__m256i)(A),(__mmask16)(B))
+ (__v16hi)(__m256i)(D), \
+ (int)(E), \
+ (__v16hi)(__m256i)(A), \
+ (__mmask16)(B)))
#define _mm256_maskz_shldi_epi16(A, B, C, D) \
- ((__m256i) __builtin_ia32_vpshld_v16hi_mask ((__v16hi)(__m256i)(B), \
- (__v16hi)(__m256i)(C),(int)(D), \
- (__v16hi)(__m256i)_mm256_setzero_si256 (), (__mmask16)(A))
+ ((__m256i) \
+ __builtin_ia32_vpshld_v16hi_mask ((__v16hi)(__m256i)(B), \
+ (__v16hi)(__m256i)(C),(int)(D), \
+ (__v16hi)(__m256i)_mm256_setzero_si256 (), \
+ (__mmask16)(A)))
#define _mm256_shldi_epi32(A, B, C) \
((__m256i) __builtin_ia32_vpshld_v8si ((__v8si)(__m256i)(A), \
- (__v8si)(__m256i)(B),(int)(C))
+ (__v8si)(__m256i)(B),(int)(C)))
#define _mm256_mask_shldi_epi32(A, B, C, D, E) \
((__m256i) __builtin_ia32_vpshld_v8si_mask ((__v8si)(__m256i)(C), \
- (__v8si)(__m256i)(D), (int)(E), (__v8si)(__m256i)(A),(__mmask8)(B))
+ (__v8si)(__m256i)(D), (int)(E), \
+ (__v8si)(__m256i)(A), \
+ (__mmask8)(B)))
#define _mm256_maskz_shldi_epi32(A, B, C, D) \
- ((__m256i) __builtin_ia32_vpshld_v8si_mask ((__v8si)(__m256i)(B), \
- (__v8si)(__m256i)(C),(int)(D), \
- (__v8si)(__m256i)_mm256_setzero_si256 (), (__mmask8)(A))
+ ((__m256i) \
+ __builtin_ia32_vpshld_v8si_mask ((__v8si)(__m256i)(B), \
+ (__v8si)(__m256i)(C),(int)(D), \
+ (__v8si)(__m256i)_mm256_setzero_si256 (), \
+ (__mmask8)(A)))
#define _mm256_shldi_epi64(A, B, C) \
((__m256i) __builtin_ia32_vpshld_v4di ((__v4di)(__m256i)(A), \
- (__v4di)(__m256i)(B),(int)(C))
+ (__v4di)(__m256i)(B),(int)(C)))
#define _mm256_mask_shldi_epi64(A, B, C, D, E) \
((__m256i) __builtin_ia32_vpshld_v4di_mask ((__v4di)(__m256i)(C), \
- (__v4di)(__m256i)(D), (int)(E), (__v4di)(__m256i)(A),(__mmask8)(B))
+ (__v4di)(__m256i)(D), (int)(E), \
+ (__v4di)(__m256i)(A), \
+ (__mmask8)(B)))
#define _mm256_maskz_shldi_epi64(A, B, C, D) \
- ((__m256i) __builtin_ia32_vpshld_v4di_mask ((__v4di)(__m256i)(B), \
- (__v4di)(__m256i)(C),(int)(D), \
- (__v4di)(__m256i)_mm256_setzero_si256 (), (__mmask8)(A))
+ ((__m256i) \
+ __builtin_ia32_vpshld_v4di_mask ((__v4di)(__m256i)(B), \
+ (__v4di)(__m256i)(C),(int)(D), \
+ (__v4di)(__m256i)_mm256_setzero_si256 (), \
+ (__mmask8)(A)))
#define _mm_shldi_epi16(A, B, C) \
((__m128i) __builtin_ia32_vpshld_v8hi ((__v8hi)(__m128i)(A), \
- (__v8hi)(__m128i)(B),(int)(C))
+ (__v8hi)(__m128i)(B),(int)(C)))
#define _mm_mask_shldi_epi16(A, B, C, D, E) \
((__m128i) __builtin_ia32_vpshld_v8hi_mask ((__v8hi)(__m128i)(C), \
- (__v8hi)(__m128i)(D), (int)(E), (__v8hi)(__m128i)(A),(__mmask8)(B))
+ (__v8hi)(__m128i)(D), (int)(E), \
+ (__v8hi)(__m128i)(A), \
+ (__mmask8)(B)))
#define _mm_maskz_shldi_epi16(A, B, C, D) \
- ((__m128i) __builtin_ia32_vpshld_v8hi_mask ((__v8hi)(__m128i)(B), \
- (__v8hi)(__m128i)(C),(int)(D), \
- (__v8hi)(__m128i)_mm_setzero_si128 (), (__mmask8)(A))
+ ((__m128i) \
+ __builtin_ia32_vpshld_v8hi_mask ((__v8hi)(__m128i)(B), \
+ (__v8hi)(__m128i)(C),(int)(D), \
+ (__v8hi)(__m128i)_mm_setzero_si128 (), \
+ (__mmask8)(A)))
#define _mm_shldi_epi32(A, B, C) \
((__m128i) __builtin_ia32_vpshld_v4si ((__v4si)(__m128i)(A), \
- (__v4si)(__m128i)(B),(int)(C))
+ (__v4si)(__m128i)(B),(int)(C)))
#define _mm_mask_shldi_epi32(A, B, C, D, E) \
((__m128i) __builtin_ia32_vpshld_v4si_mask ((__v4si)(__m128i)(C), \
- (__v4si)(__m128i)(D), (int)(E), (__v4si)(__m128i)(A),(__mmask8)(B))
+ (__v4si)(__m128i)(D), (int)(E), \
+ (__v4si)(__m128i)(A), \
+ (__mmask8)(B)))
#define _mm_maskz_shldi_epi32(A, B, C, D) \
- ((__m128i) __builtin_ia32_vpshld_v4si_mask ((__v4si)(__m128i)(B), \
- (__v4si)(__m128i)(C),(int)(D), \
- (__v4si)(__m128i)_mm_setzero_si128 (), (__mmask8)(A))
+ ((__m128i) \
+ __builtin_ia32_vpshld_v4si_mask ((__v4si)(__m128i)(B), \
+ (__v4si)(__m128i)(C),(int)(D), \
+ (__v4si)(__m128i)_mm_setzero_si128 (), \
+ (__mmask8)(A)))
#define _mm_shldi_epi64(A, B, C) \
((__m128i) __builtin_ia32_vpshld_v2di ((__v2di)(__m128i)(A), \
- (__v2di)(__m128i)(B),(int)(C))
+ (__v2di)(__m128i)(B),(int)(C)))
#define _mm_mask_shldi_epi64(A, B, C, D, E) \
((__m128i) __builtin_ia32_vpshld_v2di_mask ((__v2di)(__m128i)(C), \
- (__v2di)(__m128i)(D), (int)(E), (__v2di)(__m128i)(A),(__mmask8)(B))
+ (__v2di)(__m128i)(D), (int)(E), \
+ (__v2di)(__m128i)(A), \
+ (__mmask8)(B)))
#define _mm_maskz_shldi_epi64(A, B, C, D) \
- ((__m128i) __builtin_ia32_vpshld_v2di_mask ((__v2di)(__m128i)(B), \
- (__v2di)(__m128i)(C),(int)(D), \
- (__v2di)(__m128i)_mm_setzero_si128 (), (__mmask8)(A))
+ ((__m128i) \
+ __builtin_ia32_vpshld_v2di_mask ((__v2di)(__m128i)(B), \
+ (__v2di)(__m128i)(C),(int)(D), \
+ (__v2di)(__m128i)_mm_setzero_si128 (), \
+ (__mmask8)(A)))
#endif
extern __inline __m256i
diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
new file mode 100644
index 00000000000..0b29923b721
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshldd\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshldd\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshldd\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshldq\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshldq\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshldq\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x,y;
+volatile __mmask32 m32;
+volatile __mmask16 m16;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+ x = _mm512_shldi_epi16 (x, y, 3);
+ x = _mm512_maskz_shldi_epi16 (m32, x, y, 3);
+ x = _mm512_mask_shldi_epi16 (x, m32, y, x, 3);
+
+ x = _mm512_shldi_epi32 (x, y, 3);
+ x = _mm512_maskz_shldi_epi32 (m16, x, y, 3);
+ x = _mm512_mask_shldi_epi32 (x, m16, y, x, 3);
+
+ x = _mm512_shldi_epi64 (x, y, 3);
+ x = _mm512_maskz_shldi_epi64 (m8, x, y, 3);
+ x = _mm512_mask_shldi_epi64 (x, m8, y, x, 3);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
new file mode 100644
index 00000000000..bb4de785244
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshrdd\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshrdd\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshrdd\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshrdq\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshrdq\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpshrdq\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512i x,y;
+volatile __mmask32 m32;
+volatile __mmask16 m16;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+ x = _mm512_shrdi_epi16 (x, y, 3);
+ x = _mm512_maskz_shrdi_epi16 (m32, x, y, 3);
+ x = _mm512_mask_shrdi_epi16 (x, m32, y, x, 3);
+
+ x = _mm512_shrdi_epi32 (x, y, 3);
+ x = _mm512_maskz_shrdi_epi32 (m16, x, y, 3);
+ x = _mm512_mask_shrdi_epi32 (x, m16, y, x, 3);
+
+ x = _mm512_shrdi_epi64 (x, y, 3);
+ x = _mm512_maskz_shrdi_epi64 (m8, x, y, 3);
+ x = _mm512_mask_shrdi_epi64 (x, m8, y, x, 3);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c
index 222675e98c6..6be531d88bf 100644
--- a/gcc/testsuite/gcc.target/i386/sse-12.c
+++ b/gcc/testsuite/gcc.target/i386/sse-12.c
@@ -3,7 +3,7 @@
popcntintrin.h gfniintrin.h and mm_malloc.h are usable
with -O -std=c89 -pedantic-errors. */
/* { dg-do compile } */
-/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect" } */
+/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect" } */
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c
index 45c1c285c57..c2b192d72f6 100644
--- a/gcc/testsuite/gcc.target/i386/sse-13.c
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd" } */
+/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd" } */
/* { dg-add-options bind_pic_locally } */
#include <mm_malloc.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c
index 8795109e1b8..0d2b8b3cba0 100644
--- a/gcc/testsuite/gcc.target/i386/sse-14.c
+++ b/gcc/testsuite/gcc.target/i386/sse-14.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -mavx512vl -mavx512bf16 -menqcmd -mavx512vp2intersect" } */
+/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -mavx512vl -mavx512bf16 -menqcmd -mavx512vp2intersect" } */
/* { dg-add-options bind_pic_locally } */
#include <mm_malloc.h>
@@ -315,6 +315,24 @@ test_2 (_mm_sqrt_round_sd, __m128d, __m128d, __m128d, 9)
test_2 (_mm_sqrt_round_ss, __m128, __m128, __m128, 9)
test_2 (_mm_sub_round_sd, __m128d, __m128d, __m128d, 9)
test_2 (_mm_sub_round_ss, __m128, __m128, __m128, 9)
+test_2 (_mm512_shrdi_epi16, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shrdi_epi32, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shrdi_epi64, __m512i, __m512i, __m512i, 1)
+test_2 (_mm256_shrdi_epi16, __m256i, __m256i, __m256i, 1)
+test_2 (_mm256_shrdi_epi32, __m256i, __m256i, __m256i, 1)
+test_2 (_mm256_shrdi_epi64, __m256i, __m256i, __m256i, 1)
+test_2 (_mm_shrdi_epi16, __m128i, __m128i, __m128i, 1)
+test_2 (_mm_shrdi_epi32, __m128i, __m128i, __m128i, 1)
+test_2 (_mm_shrdi_epi64, __m128i, __m128i, __m128i, 1)
+test_2 (_mm512_shldi_epi16, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shldi_epi32, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shldi_epi64, __m512i, __m512i, __m512i, 1)
+test_2 (_mm256_shldi_epi16, __m256i, __m256i, __m256i, 1)
+test_2 (_mm256_shldi_epi32, __m256i, __m256i, __m256i, 1)
+test_2 (_mm256_shldi_epi64, __m256i, __m256i, __m256i, 1)
+test_2 (_mm_shldi_epi16, __m128i, __m128i, __m128i, 1)
+test_2 (_mm_shldi_epi32, __m128i, __m128i, __m128i, 1)
+test_2 (_mm_shldi_epi64, __m128i, __m128i, __m128i, 1)
test_2x (_mm512_cmp_round_pd_mask, __mmask8, __m512d, __m512d, 1, 8)
test_2x (_mm512_cmp_round_ps_mask, __mmask16, __m512, __m512, 1, 8)
test_2x (_mm512_maskz_roundscale_round_pd, __m512d, __mmask8, __m512d, 1, 8)
@@ -434,6 +452,24 @@ test_3 (_mm_fnmsub_round_sd, __m128d, __m128d, __m128d, __m128d, 9)
test_3 (_mm_fnmsub_round_ss, __m128, __m128, __m128, __m128, 9)
test_3 (_mm_mask_cmp_sd_mask, __mmask8, __mmask8, __m128d, __m128d, 1)
test_3 (_mm_mask_cmp_ss_mask, __mmask8, __mmask8, __m128, __m128, 1)
+test_3 (_mm512_maskz_shrdi_epi16, __m512i, __mmask32, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shrdi_epi32, __m512i, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shrdi_epi64, __m512i, __mmask8, __m512i,__m512i, 1)
+test_3 (_mm256_maskz_shrdi_epi16, __m256i, __mmask16, __m256i, __m256i, 1)
+test_3 (_mm256_maskz_shrdi_epi32, __m256i, __mmask8, __m256i,__m256i, 1)
+test_3 (_mm256_maskz_shrdi_epi64, __m256i, __mmask8, __m256i,__m256i, 1)
+test_3 (_mm_maskz_shrdi_epi16, __m128i, __mmask8, __m128i, __m128i, 1)
+test_3 (_mm_maskz_shrdi_epi32, __m128i, __mmask8, __m128i, __m128i, 1)
+test_3 (_mm_maskz_shrdi_epi64, __m128i, __mmask8, __m128i, __m128i, 1)
+test_3 (_mm512_maskz_shldi_epi16, __m512i, __mmask32, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shldi_epi32, __m512i, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shldi_epi64, __m512i, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm256_maskz_shldi_epi16, __m256i, __mmask16, __m256i, __m256i, 1)
+test_3 (_mm256_maskz_shldi_epi32, __m256i, __mmask8, __m256i, __m256i, 1)
+test_3 (_mm256_maskz_shldi_epi64, __m256i, __mmask8, __m256i, __m256i, 1)
+test_3 (_mm_maskz_shldi_epi16, __m128i, __mmask8, __m128i, __m128i, 1)
+test_3 (_mm_maskz_shldi_epi32, __m128i, __mmask8, __m128i, __m128i, 1)
+test_3 (_mm_maskz_shldi_epi64, __m128i, __mmask8, __m128i, __m128i, 1)
test_3v (_mm512_i32scatter_epi32, void *, __m512i, __m512i, 1)
test_3v (_mm512_i32scatter_epi64, void *, __m256i, __m512i, 1)
test_3v (_mm512_i32scatter_pd, void *, __m256i, __m512d, 1)
@@ -558,6 +594,24 @@ test_4 (_mm_mask3_fnmsub_round_sd, __m128d, __m128d, __m128d, __m128d, __mmask8,
test_4 (_mm_mask3_fnmsub_round_ss, __m128, __m128, __m128, __m128, __mmask8, 9)
test_4 (_mm_maskz_fnmsub_round_sd, __m128d, __mmask8, __m128d, __m128d, __m128d, 9)
test_4 (_mm_maskz_fnmsub_round_ss, __m128, __mmask8, __m128, __m128, __m128, 9)
+test_4 (_mm512_mask_shrdi_epi16, __m512i, __m512i, __mmask32, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shrdi_epi32, __m512i, __m512i, __mmask16, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shrdi_epi64, __m512i, __m512i, __mmask8, __m512i, __m512i, 1)
+test_4 (_mm256_mask_shrdi_epi16, __m256i, __m256i, __mmask16, __m256i, __m256i, 1)
+test_4 (_mm256_mask_shrdi_epi32, __m256i, __m256i, __mmask8, __m256i, __m256i, 1)
+test_4 (_mm256_mask_shrdi_epi64, __m256i, __m256i, __mmask8, __m256i, __m256i, 1)
+test_4 (_mm_mask_shrdi_epi16, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
+test_4 (_mm_mask_shrdi_epi32, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
+test_4 (_mm_mask_shrdi_epi64, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
+test_4 (_mm512_mask_shldi_epi16, __m512i, __m512i, __mmask32, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shldi_epi32, __m512i, __m512i, __mmask16, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shldi_epi64, __m512i, __m512i, __mmask8, __m512i, __m512i, 1)
+test_4 (_mm256_mask_shldi_epi16, __m256i, __m256i, __mmask16, __m256i, __m256i, 1)
+test_4 (_mm256_mask_shldi_epi32, __m256i, __m256i, __mmask8, __m256i, __m256i, 1)
+test_4 (_mm256_mask_shldi_epi64, __m256i, __m256i, __mmask8, __m256i, __m256i, 1)
+test_4 (_mm_mask_shldi_epi16, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
+test_4 (_mm_mask_shldi_epi32, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
+test_4 (_mm_mask_shldi_epi64, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
test_4v (_mm512_mask_i32scatter_epi32, void *, __mmask16, __m512i, __m512i, 1)
test_4v (_mm512_mask_i32scatter_epi64, void *, __mmask8, __m256i, __m512i, 1)
test_4v (_mm512_mask_i32scatter_pd, void *, __mmask8, __m256i, __m512d, 1)
diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c
index 1c786bb9392..9be7f2d5a58 100644
--- a/gcc/testsuite/gcc.target/i386/sse-22.c
+++ b/gcc/testsuite/gcc.target/i386/sse-22.c
@@ -102,7 +102,7 @@
#ifndef DIFFERENT_PRAGMAS
-#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect")
+#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512vbmi2,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect")
#endif
/* Following intrinsics require immediate arguments. They
@@ -219,7 +219,7 @@ test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1)
/* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */
#ifdef DIFFERENT_PRAGMAS
-#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect")
+#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx512vbmi2,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect")
#endif
#include <immintrin.h>
test_1 (_cvtss_sh, unsigned short, float, 1)
@@ -438,6 +438,24 @@ test_2 (_mm512_sub_round_pd, __m512d, __m512d, __m512d, 9)
test_2 (_mm512_sub_round_ps, __m512, __m512, __m512, 9)
test_2 (_mm_cmp_sd_mask, __mmask8, __m128d, __m128d, 1)
test_2 (_mm_cmp_ss_mask, __mmask8, __m128, __m128, 1)
+test_2 (_mm512_shrdi_epi16, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shrdi_epi32, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shrdi_epi64, __m512i, __m512i, __m512i, 1)
+test_2 (_mm256_shrdi_epi16, __m256i, __m256i, __m256i, 1)
+test_2 (_mm256_shrdi_epi32, __m256i, __m256i, __m256i, 1)
+test_2 (_mm256_shrdi_epi64, __m256i, __m256i, __m256i, 1)
+test_2 (_mm_shrdi_epi16, __m128i, __m128i, __m128i, 1)
+test_2 (_mm_shrdi_epi32, __m128i, __m128i, __m128i, 1)
+test_2 (_mm_shrdi_epi64, __m128i, __m128i, __m128i, 1)
+test_2 (_mm512_shldi_epi16, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shldi_epi32, __m512i, __m512i, __m512i, 1)
+test_2 (_mm512_shldi_epi64, __m512i, __m512i, __m512i, 1)
+test_2 (_mm256_shldi_epi16, __m256i, __m256i, __m256i, 1)
+test_2 (_mm256_shldi_epi32, __m256i, __m256i, __m256i, 1)
+test_2 (_mm256_shldi_epi64, __m256i, __m256i, __m256i, 1)
+test_2 (_mm_shldi_epi16, __m128i, __m128i, __m128i, 1)
+test_2 (_mm_shldi_epi32, __m128i, __m128i, __m128i, 1)
+test_2 (_mm_shldi_epi64, __m128i, __m128i, __m128i, 1)
#ifdef __x86_64__
test_2 (_mm_cvt_roundi64_sd, __m128d, __m128d, long long, 9)
test_2 (_mm_cvt_roundi64_ss, __m128, __m128, long long, 9)
@@ -544,6 +562,24 @@ test_3 (_mm512_ternarylogic_epi32, __m512i, __m512i, __m512i, __m512i, 1)
test_3 (_mm512_ternarylogic_epi64, __m512i, __m512i, __m512i, __m512i, 1)
test_3 (_mm_mask_cmp_sd_mask, __mmask8, __mmask8, __m128d, __m128d, 1)
test_3 (_mm_mask_cmp_ss_mask, __mmask8, __mmask8, __m128, __m128, 1)
+test_3 (_mm512_maskz_shrdi_epi16, __m512i, __mmask32, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shrdi_epi32, __m512i, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shrdi_epi64, __m512i, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm256_maskz_shrdi_epi16, __m256i, __mmask16, __m256i, __m256i, 1)
+test_3 (_mm256_maskz_shrdi_epi32, __m256i, __mmask8, __m256i, __m256i, 1)
+test_3 (_mm256_maskz_shrdi_epi64, __m256i, __mmask8, __m256i, __m256i, 1)
+test_3 (_mm_maskz_shrdi_epi16, __m128i, __mmask8, __m128i, __m128i, 1)
+test_3 (_mm_maskz_shrdi_epi32, __m128i, __mmask8, __m128i, __m128i, 1)
+test_3 (_mm_maskz_shrdi_epi64, __m128i, __mmask8, __m128i, __m128i, 1)
+test_3 (_mm512_maskz_shldi_epi16, __m512i, __mmask32, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shldi_epi32, __m512i, __mmask16, __m512i, __m512i, 1)
+test_3 (_mm512_maskz_shldi_epi64, __m512i, __mmask8, __m512i, __m512i, 1)
+test_3 (_mm256_maskz_shldi_epi16, __m256i, __mmask16, __m256i, __m256i, 1)
+test_3 (_mm256_maskz_shldi_epi32, __m256i, __mmask8, __m256i, __m256i, 1)
+test_3 (_mm256_maskz_shldi_epi64, __m256i, __mmask8, __m256i, __m256i, 1)
+test_3 (_mm_maskz_shldi_epi16, __m128i, __mmask8, __m128i, __m128i, 1)
+test_3 (_mm_maskz_shldi_epi32, __m128i, __mmask8, __m128i, __m128i, 1)
+test_3 (_mm_maskz_shldi_epi64, __m128i, __mmask8, __m128i, __m128i, 1)
test_3v (_mm512_i32scatter_epi32, void *, __m512i, __m512i, 1)
test_3v (_mm512_i32scatter_epi64, void *, __m256i, __m512i, 1)
test_3v (_mm512_i32scatter_pd, void *, __m256i, __m512d, 1)
@@ -658,6 +694,24 @@ test_4 (_mm_mask3_fnmsub_round_sd, __m128d, __m128d, __m128d, __m128d, __mmask8,
test_4 (_mm_mask3_fnmsub_round_ss, __m128, __m128, __m128, __m128, __mmask8, 9)
test_4 (_mm_maskz_fnmsub_round_sd, __m128d, __mmask8, __m128d, __m128d, __m128d, 9)
test_4 (_mm_maskz_fnmsub_round_ss, __m128, __mmask8, __m128, __m128, __m128, 9)
+test_4 (_mm512_mask_shrdi_epi16, __m512i, __m512i, __mmask32, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shrdi_epi32, __m512i, __m512i, __mmask16, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shrdi_epi64, __m512i, __m512i, __mmask8, __m512i, __m512i, 1)
+test_4 (_mm256_mask_shrdi_epi16, __m256i, __m256i, __mmask16, __m256i, __m256i, 1)
+test_4 (_mm256_mask_shrdi_epi32, __m256i, __m256i, __mmask8, __m256i, __m256i, 1)
+test_4 (_mm256_mask_shrdi_epi64, __m256i, __m256i, __mmask8, __m256i, __m256i, 1)
+test_4 (_mm_mask_shrdi_epi16, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
+test_4 (_mm_mask_shrdi_epi32, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
+test_4 (_mm_mask_shrdi_epi64, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
+test_4 (_mm512_mask_shldi_epi16, __m512i, __m512i, __mmask32, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shldi_epi32, __m512i, __m512i, __mmask16, __m512i, __m512i, 1)
+test_4 (_mm512_mask_shldi_epi64, __m512i, __m512i, __mmask8, __m512i, __m512i, 1)
+test_4 (_mm256_mask_shldi_epi16, __m256i, __m256i, __mmask16, __m256i, __m256i, 1)
+test_4 (_mm256_mask_shldi_epi32, __m256i, __m256i, __mmask8, __m256i, __m256i, 1)
+test_4 (_mm256_mask_shldi_epi64, __m256i, __m256i, __mmask8, __m256i, __m256i, 1)
+test_4 (_mm_mask_shldi_epi16, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
+test_4 (_mm_mask_shldi_epi32, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
+test_4 (_mm_mask_shldi_epi64, __m128i, __m128i, __mmask8, __m128i, __m128i, 1)
test_4v (_mm512_mask_i32scatter_epi32, void *, __mmask16, __m512i, __m512i, 1)
test_4v (_mm512_mask_i32scatter_epi64, void *, __mmask8, __m256i, __m512i, 1)
test_4v (_mm512_mask_i32scatter_pd, void *, __mmask8, __m256i, __m512d, 1)
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