[gcc/devel/c++-coroutines] x86_64: Use peephole2 to eliminate redundant moves.

[Iain D Sandoe]

https://gcc.gnu.org/g:778c15d3ca1d0ee026de67d56ad763a4a8ad302a

commit 778c15d3ca1d0ee026de67d56ad763a4a8ad302a
Author: Roger Sayle <roger@nextmovesoftware.com>
Date:   Wed Aug 12 08:31:25 2020 +0100

    x86_64: Use peephole2 to eliminate redundant moves.
    
    The recent fix for mul_widen_cost revealed an interesting
    quirk of ira/reload register allocation on x86_64.  As shown in
    https://gcc.gnu.org/pipermail/gcc-patches/2020-August/551648.html
    for gcc.target/i386/pr71321.c we generate the following code that
    performs unnecessary register shuffling.
    
            movl    $-51, %edx
            movl    %edx, %eax
            mulb    %dil
    
    Various discussions in bugzilla seem to point to reload preferring
    not to load constants directly into CLASS_LIKELY_SPILLED_P registers.
    Whatever the cause, one solution (workaround), that doesn't involve
    rewriting a register allocator, is to use peephole2 to spot this
    wierdness and eliminate it.  With this peephole2 the above three
    instructions (from pr71321.c) are replaced with:
    
            movl    $-51, %eax
            mulb    %dil
    
    2020-08-12  Roger Sayle  <roger@nextmovesoftware.com>
                Uroš Bizjak  <ubizjak@gmail.com>
    
    gcc/ChangeLog
            * config/i386/i386.md (peephole2): Reduce unnecessary
            register shuffling produced by register allocation.

Diff:
---
 gcc/config/i386/i386.md | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 4e916bf3c32..f3799ac3e6f 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -18946,6 +18946,16 @@
   operands[2] = gen_rtx_REG (GET_MODE (operands[0]), FLAGS_REG);
   ix86_expand_clear (operands[1]);
 })
+
+;; Reload dislikes loading constants directly into class_likely_spilled
+;; hard registers.  Try to tidy things up here.
+(define_peephole2
+  [(set (match_operand:SWI 0 "general_reg_operand")
+	(match_operand:SWI 1 "x86_64_general_operand"))
+   (set (match_operand:SWI 2 "general_reg_operand")
+	(match_dup 0))]
+  "peep2_reg_dead_p (2, operands[0])"
+  [(set (match_dup 2) (match_dup 1))])
 
 ;; Misc patterns (?)