[gcc(refs/users/guojiufu/heads/personal-branch)] amdgcn: Add fold_left_plus vector reductions
Jiu Fu Guo
guojiufu@gcc.gnu.org
Mon Aug 10 06:36:12 GMT 2020
https://gcc.gnu.org/g:bf628a97efaf11204ab02527b30ca71d7759ca37
commit bf628a97efaf11204ab02527b30ca71d7759ca37
Author: Andrew Stubbs <ams@codesourcery.com>
Date: Mon Feb 10 13:23:29 2020 +0000
amdgcn: Add fold_left_plus vector reductions
These aren't real in-order instructions, because the ISA can't do that
quickly, but a means to allow regular out-of-order reductions when that's
good enough, but the middle-end doesn't know so.
gcc/
* config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
Diff:
---
gcc/config/gcn/gcn-valu.md | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 6d7fecaa12c..26559ff765e 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -3076,6 +3076,26 @@
DONE;
})
+;; Warning: This "-ffast-math" implementation converts in-order reductions
+;; into associative reductions. It's also used where OpenMP or
+;; OpenACC paralellization has already broken the in-order semantics.
+(define_expand "fold_left_plus_<mode>"
+ [(match_operand:<SCALAR_MODE> 0 "register_operand")
+ (match_operand:<SCALAR_MODE> 1 "gcn_alu_operand")
+ (match_operand:V_FP 2 "gcn_alu_operand")]
+ "can_create_pseudo_p ()
+ && (flag_openacc || flag_openmp
+ || flag_associative_math)"
+ {
+ rtx dest = operands[0];
+ rtx scalar = operands[1];
+ rtx vector = operands[2];
+ rtx tmp = gen_reg_rtx (<SCALAR_MODE>mode);
+
+ emit_insn (gen_reduc_plus_scal_<mode> (tmp, vector));
+ emit_insn (gen_add<scalar_mode>3 (dest, scalar, tmp));
+ DONE;
+ })
(define_insn "*<reduc_op>_dpp_shr_<mode>"
[(set (match_operand:V_1REG 0 "register_operand" "=v")
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