r278609 - in /trunk/gcc/testsuite: ChangeLog gc...

[claziss@gcc.gnu.org]

Author: claziss
Date: Fri Nov 22 07:59:54 2019
New Revision: 278609

URL: https://gcc.gnu.org/viewcvs?rev=278609&root=gcc&view=rev
Log:
[ARC] Fix ARC target specific tests.

Fix ARC specific tests by improving the matching pattern and adding
the missing functionality in arc.exp

gcc/tests
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/add_n-combine.c: Match add1/2/3 instruction in
	output assembly.
	* gcc.target/arc/arc.exp (check_effective_target_codedensity):
	Add.
	* gcc.target/arc/cmem-7.c: Fix matching patterns.
	* gcc.target/arc/cmem-bit-1.c: Likewise.
	* gcc.target/arc/cmem-bit-2.c: Likewise.
	* gcc.target/arc/cmem-bit-3.c: Likewise.
	* gcc.target/arc/cmem-bit-4.c: Likewise.
	* gcc.target/arc/interrupt-2.c: Match rtie insn for A7.
	* gcc.target/arc/store-merge-1.c: This test is only meaningful for
	architectures with double load/store operations.

Modified:
    trunk/gcc/testsuite/ChangeLog
    trunk/gcc/testsuite/gcc.target/arc/add_n-combine.c
    trunk/gcc/testsuite/gcc.target/arc/arc.exp
    trunk/gcc/testsuite/gcc.target/arc/cmem-7.c
    trunk/gcc/testsuite/gcc.target/arc/cmem-bit-1.c
    trunk/gcc/testsuite/gcc.target/arc/cmem-bit-2.c
    trunk/gcc/testsuite/gcc.target/arc/cmem-bit-3.c
    trunk/gcc/testsuite/gcc.target/arc/cmem-bit-4.c
    trunk/gcc/testsuite/gcc.target/arc/interrupt-2.c
    trunk/gcc/testsuite/gcc.target/arc/store-merge-1.c