r242293 - in /branches/ARM/sve-branch/gcc/confi...

[rsandifo@gcc.gnu.org]

Author: rsandifo
Date: Fri Nov 11 17:35:09 2016
New Revision: 242293

URL: https://gcc.gnu.org/viewcvs?rev=242293&root=gcc&view=rev
Log:
[AArch64] Set NUM_POLY_INT_COEFFS to 2

This patch switches the AArch64 port to use polynomial integers
and updates code as necessary to keep it compiling.

One potentially-significant change is to
aarch64_hard_regno_caller_save_mode.  The old implementation
was written in a pretty conservative way: it changed the default
behaviour for single-register values, but used the default handling
for multi-register values.

I don't think that's necessary, since the interesting cases for this
macro are usually the single-register ones.  Multi-register modes take
up the whole of the constituent registers and the move patterns for all
multi-register modes should be equally good.

Using the original mode for multi-register cases stops us from using
SVE modes to spill multi-register NEON values.  This was caught by
gcc.c-torture/execute/pr47538.c.

Modified:
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64-builtins.c
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64-modes.def
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64-protos.h
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64-simd.md
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64.c
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64.h
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64.md