r194261 - in /branches/ARM/aarch64-4.7-branch/g...
jgreenhalgh@gcc.gnu.org
jgreenhalgh@gcc.gnu.org
Thu Dec 6 16:16:00 GMT 2012
Author: jgreenhalgh
Date: Thu Dec 6 16:15:57 2012
New Revision: 194261
URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=194261
Log:
[AARCH64-4.7] Add zip{1, 2}, uzp{1, 2}, trn{1, 2} support for vector permute.
gcc/
Backport from mainline.
2012-12-05 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64-simd-builtins.def: Add new builtins.
* config/aarch64/aarch64-simd.md (simd_type): Add uzp.
(aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): New.
* config/aarch64/aarch64.c (aarch64_evpc_trn): New.
(aarch64_evpc_uzp): Likewise.
(aarch64_evpc_zip): Likewise.
(aarch64_expand_vec_perm_const_1): Check for trn, zip, uzp patterns.
* config/aarch64/iterators.md (unspec): Add neccessary unspecs.
(PERMUTE): New.
(perm_insn): Likewise.
(perm_hilo): Likewise.
Modified:
branches/ARM/aarch64-4.7-branch/gcc/ChangeLog.aarch64
branches/ARM/aarch64-4.7-branch/gcc/config/aarch64/aarch64-simd-builtins.def
branches/ARM/aarch64-4.7-branch/gcc/config/aarch64/aarch64-simd.md
branches/ARM/aarch64-4.7-branch/gcc/config/aarch64/aarch64.c
branches/ARM/aarch64-4.7-branch/gcc/config/aarch64/iterators.md
More information about the Gcc-cvs
mailing list