r129522 - in /trunk/gcc: ChangeLog config/mips/...

[rsandifo@gcc.gnu.org]

Author: rsandifo
Date: Sun Oct 21 09:07:13 2007
New Revision: 129522

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=129522
Log:
gcc/
	* doc/invoke.texi (-mpaired-single): Don't say that the option
	requires 64-bit code.
	* config/mips/mips-protos.h (mips_modes_tieable_p): Declare.
	* config/mips/mips.h (ISA_HAS_PAIRED_SINGLE): New macro.
	(ISA_HAS_NMADD_NMSUB): Add a mode argument.  Return true for
	V2SF if ISA_MIPS32R2.
	(MODES_TIEABLE_P): Use mips_modes_tieable_p.
	* config/mips/mips.c (mips_rtx_costs): Pass a mode argument
	to ISA_HAS_NMADD_NMSUB.
	(mips_split_doubleword_move): Handle V2SF.
	(mips_modes_tieable_p): New function.
	(override_options): Report a warning rather than an error when
	-mpaired-single is used on ISAs that don't support it; use
	ISA_HAS_PAIRED_SINGLE to check that case.
	* config/mips/mips.md (MOVE64): New mode iterator.  Replace DI
	and DF move splitters with a single MOVE64 splitter, thereby adding
	a V2SF splitter too.
	(SPLITF): Add TARGET_DOUBLE_FLOAT conditions to DI and DF.
	Add a TARGET_FLOAT64 condition to TF.  Add V2SF to the iterator.
	(HALFMODE): Add V2SF.
	(*nmadd<mode>, *nmadd<mode>_fastmath, *nmsub<mode>)
	(*nmsub<mode>_fastmath): Add a mode argument to ISA_HAS_NMADD_NMSUB.
	(movv2sf_hardfloat_64bit): Tweak ordering of conditions.
	(movv2sf_hardfloat_32bit): New pattern.
	(load_low<mode>, load_high<mode>, store_word<mode>): Remove
	TARGET_DOUBLE_FLOAT conditions.

gcc/testsuite/
	* gcc.dg/vect/vect.exp: Extend -mpaired-single handling to all
	MIPS targets.
	* g++.dg/vect/vect.exp: Likewise.
	* lib/fortran-torture.exp: Likewise.
	* gcc.target/mips/mips-ps-1.c: Use mpaired_single rather than
	mipsisa64*-*-* as the target selector.  Remove -mips64,
	-mhard-float and -mgp64 from the options list.
	* gcc.target/mips/mips-ps-2.c: Likewise.
	* gcc.target/mips/mips-ps-3.c: Likewise.
	* gcc.target/mips/mips-ps-4.c: Likewise.
	* gcc.target/mips/mips-ps-6.c: Likewise.
	* gcc.target/mips/mips-ps-5.c: Remove -mhard-float from the
	options list.
	* gcc.target/mips/sb1-1.c: Likewise.
	* gcc.target/mips/mips-ps-type.c: Likewise.
	* gcc.target/mips/mips-ps-7.c: New test.
	* gcc.target/mips/mips-ps-type-2.c: Likewise.
	* gcc.target/mips/fpr-moves-6.c: Remove XFAIL.
	* gcc.target/mips/mips.exp (setup_mips_tests): Set mips_fp and
	mips_gp instead of mips_fp64 and mips_gp64.  Treat -mgp32 -mfp64
	as forcing an ABI and an architecture.
	(is_gp32_flag, is_gp64_flag): Fold into...
	(dg-mips-options): ...here.  Make -mpaired-single imply -mfp64,
	then -mfp64 imply -mhard-float.  Apply register rules after the
	loop.  Handle -march=mipsN like -mipsN.

Added:
    trunk/gcc/testsuite/gcc.target/mips/mips-ps-7.c
    trunk/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/mips/mips-protos.h
    trunk/gcc/config/mips/mips.c
    trunk/gcc/config/mips/mips.h
    trunk/gcc/config/mips/mips.md
    trunk/gcc/doc/invoke.texi
    trunk/gcc/testsuite/ChangeLog
    trunk/gcc/testsuite/g++.dg/vect/vect.exp
    trunk/gcc/testsuite/gcc.dg/vect/vect.exp
    trunk/gcc/testsuite/gcc.target/mips/fpr-moves-6.c
    trunk/gcc/testsuite/gcc.target/mips/mips-ps-1.c
    trunk/gcc/testsuite/gcc.target/mips/mips-ps-2.c
    trunk/gcc/testsuite/gcc.target/mips/mips-ps-3.c
    trunk/gcc/testsuite/gcc.target/mips/mips-ps-4.c
    trunk/gcc/testsuite/gcc.target/mips/mips-ps-5.c
    trunk/gcc/testsuite/gcc.target/mips/mips-ps-6.c
    trunk/gcc/testsuite/gcc.target/mips/mips-ps-type.c
    trunk/gcc/testsuite/gcc.target/mips/mips.exp
    trunk/gcc/testsuite/gcc.target/mips/sb1-1.c
    trunk/gcc/testsuite/lib/fortran-torture.exp