[Bug tree-optimization/125390] [17 Regression][RISCV][RVV] ICE in cc1 during tree loop vectorization with -march=rv64gcv_zvl256b at -O2/-O3

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125390

--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Robin Dapp <rdapp@gcc.gnu.org>:

https://gcc.gnu.org/g:ec58d736cd572bb01cfba986f090ab42f195a464

commit r17-3907-gec58d736cd572bb01cfba986f090ab42f195a464
Author: Robin Dapp <rdapp.gcc@gmail.com>
Date:   Fri Jul 17 12:41:26 2026 +0200

    expand: Handle non-word addressable modes.

    In order to be able to set REGMODE_NATURAL_SIZE = "one vector register"
    for aarch64 and riscv, we need to make some adjustments to how we expand
    modes that cannot be split into words.  In a few critical spots the
    assumption of "either we have a move or we can split into words" was
    implicitly hard coded.

    The fix turned into a small game of whack-a-mole and this patch takes the
    approach of just spilling to memory if REGMODE_NATURAL_SIZE >
    UNITS_PER_WORD.  In lower subreg we just don't decompose a register if
    the same condition applies.

    Even with these changes, it was still possible to make no
    progress during expansion of a subreg-punned register like
     (subreg:TI (reg:V4SI))
    where we cannot split the inner register nor move the subreg into a
    register if the target has no TImode move pattern.

    Rather than opening up the possibility of spilling in
    emit_move_insn, the patch instead documents the requirement that each
    target defining REGMODE_NATURAL_SIZE provide integer move patterns
    up to (and including) the largest REGMODE_NATURAL_SIZE.

    Co-authored-by: Richard Sandiford <rdsandiford@googlemail.com>

            PR target/124996
            PR middle-end/125390

    gcc/ChangeLog:

            * doc/tm.texi: Document int move requirements for
            REGMODE_NATURAL_SIZE.
            * doc/tm.texi.in: Likewise.
            * expmed.cc (store_bit_field_1): Spill unsplittable modes to
            memory.
            (store_integral_bit_field): Defer unsplittable modes to
            extract_bit_field.
            (extract_bit_field_1): Spill if necessary.
            * expr.cc (read_complex_part): Adjust assert.
            * lower-subreg.cc (interesting_mode_p): Don't consider
            unsplittable modes as interesting.
            (simple_move_operand): Don't split subregs whose outer mode
            can be split but the inner mode cannot.
            (simplify_subreg_concatn): Don't insist the outer mode is
            interesting but rather check that its size is constant.