[Bug target/103383] Microblaze bswaphi2 can cause issues with delay slots
cvs-commit at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Sat May 16 12:33:33 GMT 2026
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103383
--- Comment #19 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-15 branch has been updated by Michael Eager
<eager@gcc.gnu.org>:
https://gcc.gnu.org/g:474bce3d2ddb6417e7acad84bbad7524018de4e4
commit r15-11175-g474bce3d2ddb6417e7acad84bbad7524018de4e4
Author: Gopi Kumar Bulusu <gopi@sankhya.com>
Date: Thu Apr 2 12:02:59 2026 +0530
Fix incorrect length for __builtin_bswap16
The bswaphi pattern generates 2 assembly instructions with a length
of 8 bytes. The bswaphi pattern missed the length attribute, as a
result the default of 8 bytes was assumed. This allowed the "8 byte"
bswaphi pattern to be scheduled into the delay slot of a branch
instruction where only a 4 byte instruction can be placed. This
patch addresses the problem.
Add trunk commit to release/gcc-15 branch.
2026-05-16 Michael Eager <eager@eagercon.com>
gcc/ChangeLog:
PR target/103383
* config/microblaze/microblaze.md: bswaphi2: (set_attr length 8)
gcc/testsuite/ChangeLog:
PR target/103383
* gcc.target/microblaze/isa/pr103383.c: New test.
Signed-off-by: Nagaraju Mekala <nmekala@xilix.com>
Signed-off-by: Gopi Kumar Bulusu <gopi@sankhya.com>
Signed-off-by: Michael J. Eager <eager@eagercon.com>
More information about the Gcc-bugs
mailing list