[Bug target/121268] RISC-V: Possible optimization when manipulating rightmost bits with zbb enabled

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121268

Jeffrey A. Law <law at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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           Assignee|vineetg at gcc dot gnu.org         |law at gcc dot gnu.org

--- Comment #3 from Jeffrey A. Law <law at gcc dot gnu.org> ---
Guessing due to various issues this isn't a priority anymore.  I'v got a couple
of riscv 3->2 splitters that get us where we want to go.  Essentially they take
advantage of the ~(-x) == x - 1 property to rewrite and steer towards andn for
the second operation.