[Bug target/124349] assemble failure "operand size mismatch for `vcomisbf16'" with -masm=intel
cvs-commit at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Thu Mar 5 09:06:49 GMT 2026
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124349
--- Comment #11 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:
https://gcc.gnu.org/g:ed29af41006b65e3a3fbf5eb5078aa133605e75b
commit r16-7906-ged29af41006b65e3a3fbf5eb5078aa133605e75b
Author: Jakub Jelinek <jakub@redhat.com>
Date: Thu Mar 5 10:05:44 2026 +0100
i386: Fix up last -masm=intel operand of vcvthf82ph [PR124349]
gas expects for this instruction
vcvthf82ph xmm30, QWORD PTR [r9]
vcvthf82ph ymm30, XMMWORD PTR [r9]
vcvthf82ph zmm30, YMMWORD PTR [r9]
i.e. the memory size is half of the dest register size.
We currently emit it for the last 2 forms but emit XMMWORD PTR
for the first one too. So, we need %q1 for V8HF and for V16HF/V32HF
can either use just %1 or %x1/%t1. There is no define_mode_attr
that would provide those, so I've added one just for this insn.
2026-03-05 Jakub Jelinek <jakub@redhat.com>
PR target/124349
* config/i386/sse.md (iptrssebvec_2): New define_mode_attr.
(cvthf82ph<mode><mask_name>): Use it for -masm=intel input
operand.
* gcc.target/i386/avx10_2-pr124349-2.c: New test.
More information about the Gcc-bugs
mailing list