[Bug target/124294] [15/16 Regression] wrong operand order of "vmovw" of xmm16 with -masm=intel since r15-3184

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124294

--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:7a3c4f7efe8d11d1dd19ba96b5b7e553c46d2102

commit r16-7841-g7a3c4f7efe8d11d1dd19ba96b5b7e553c46d2102
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Mon Mar 2 10:46:00 2026 +0100

    i386: Fix up avx512fp16_mov<mode> AVX10.2 operand order for -masm=intel
[PR124294]

    This insn uses incorrect operand order for -masm=intel in the AVX10.2
    variant.
    I've checked for similar mistakes and haven't found any in all the
i386/*.md
    files.

    Note, I also wonder why the insn doesn't use * in front of the define_insn
    name, I can't find anything that would need gen_avx512fp16_movv8{hi,hf,bf}.

    2026-03-02  Jakub Jelinek  <jakub@redhat.com>

            PR target/124294
            * config/i386/sse.md (avx512fp16_mov<mode>): Fix ordering of
operands
            for -masm=intel for the avx10_2 alternative.  Fix up indentation in
            the insn condition.
            (vec_set<mode>_0): Fix comment typo, higer -> higher.

            * gcc.target/i386/avx10_2-pr124294.c: New test.