[Bug target/125949] x86: avxvnniint8 instructions with higher registers ( evex prefix) getting generated for -march=znver6

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125949

--- Comment #8 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-16 branch has been updated by Venkataramanan Kumar
<vekumar@gcc.gnu.org>:

https://gcc.gnu.org/g:3255a97cb2e0c7c397f422e8af7afa8531c7f374

commit r16-9185-g3255a97cb2e0c7c397f422e8af7afa8531c7f374
Author: vekumar <Venkataramanan.Kumar@amd.com>
Date:   Mon Jun 29 11:44:11 2026 +0530

    i386: Restrict AVX-VNNI-INT8 insns to VEX encoding [PR125949]

    The vpdpb{ss,su,uu}d[s] instructions from AVX-VNNI-INT8 only have a VEX
    encoding; the EVEX form of these operations is provided by AVX10.2.  A
    target such as -march=znver6 enables AVX-VNNI-INT8 together with the
    AVX-512 xmm/ymm16-31 register file but does not have AVX10.2.  The
    vpdp<vpdotprodtype>_<mode> pattern used a single "v" alternative with a
    "maybe_evex" prefix, so under register pressure the allocator could pick
    xmm/ymm16-31 and the instruction was promoted to its EVEX form, which is
    not available on such targets.

    Add a VEX-only alternative that keeps the operands in xmm/ymm0-15
    (enabled for AVX-VNNI-INT8) and gate the existing EVEX alternative on
    AVX10.2.  When AVX10.2 is not available only the VEX alternative is
    enabled, so the high registers are no longer used and the EVEX form is
    never emitted.

    gcc/ChangeLog:

            PR target/125949
            * config/i386/i386.md ("isa"): Add avxvnniint8.
            ("enabled"): Adjust for avxvnniint8.
            * config/i386/sse.md (vpdp<vpdotprodtype>_<mode>): Adjust for
            AVXVNNIINT8.

    gcc/testsuite/ChangeLog:

            PR target/125949
            * gcc.target/i386/pr125949.c: New test.

    (cherry picked from commit 314bd1495ca78f5934f83a4dbc6028dd34fb0652)