[Bug rtl-optimization/123883] Inefficient bit manipulation code on RISC-V port

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123883

--- Comment #5 from Jeffrey A. Law <law at gcc dot gnu.org> ---
So just an FYI.  The changes committed earlier today improve this case a bit.

Previously we generated the code shown on the initial report.  After today's
patch we turn the li+sllw+xor into binv+sext.  It's a tiny improvement since
the "li" was probably almost free anyway.

I've wandered the .combine dump and I don't see that recognizing the binv
sequence has unlocked further improvements.