[Bug target/125736] GCC doesn't use implicit zero-extended register in address

[lh_mouse at 126 dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=125736

--- Comment #5 from LIU Hao <lh_mouse at 126 dot com> ---
LLM suggests that this be implemented by adding a peephole pattern which:

1. Looks for two consecutive instructions, where the first one is a
   zero-extension from SI to DI mode, and the second one is a comparison of
   the DI result with a constant <= 0xFFFFFFFF.

2. Transforms the second instruction into a comparison of the SI sub-register
   with the constant.