[Bug middle-end/126405] [15/16/17 Regression] Wrong code at -O2 on aarch64

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126405

--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kyrylo Tkachov <ktkachov@gcc.gnu.org>:

https://gcc.gnu.org/g:95ee9c9e74eb93414bbcd76b02e1fcbec383f2ce

commit r17-2743-g95ee9c9e74eb93414bbcd76b02e1fcbec383f2ce
Author: Kyrylo Tkachov <ktkachov@nvidia.com>
Date:   Sun Jul 26 03:18:46 2026 -0700

    cfgexpand: Verify that partitions do not share a MEM_EXPR [PR126405]

    Two stack slots carrying one MEM_EXPR read as a single object to
    MEM_EXPR-based disambiguation.  That is how PR121957, PR123625 and PR126405
    each became wrong code: the load/store pair-fusion pass identifies a
location
    by a MEM_EXPR base and an offset from it, so it fused accesses that belong
to
    different slots and redirected a store.

    out-of-SSA maintains the invariant, but a break in it stays silent until
some
    consumer acts on it, and only for the subset of functions that consumer
happens
    to look at.
    Check it directly once per function under flag_checking, after every
partition
    has been given its RTL, so that a regression here is an ICE rather than a
    miscompile.

    Bootstrapped and tested on aarch64-none-linux-gnu and x86_64-linux-gnu.

    gcc/ChangeLog:

            PR middle-end/126405
            * cfgexpand.cc (verify_partition_mem_exprs): New function.
            (pass_expand::execute): Call it.

    Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>