[Bug target/105116] ICE in lra_split_hard_reg_for, at lra-assigns.cc:1870 (error: unable to find a register to spill)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105116

--- Comment #6 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-15 branch has been updated by Kyrylo Tkachov
<ktkachov@gcc.gnu.org>:

https://gcc.gnu.org/g:5a3697eaf593234d731a527651aa5029a21837b8

commit r15-11390-g5a3697eaf593234d731a527651aa5029a21837b8
Author: Kyrylo Tkachov <ktkachov@nvidia.com>
Date:   Wed Jun 17 07:25:31 2026 -0700

    LRA: reload non-representable subregs of hard registers through memory
[PR105116]

    PR target/105116 is an aarch64 ICE in lra_split_hard_reg_for ("unable to
    find a register to spill").  A wide vector value (OImode, a pair of Q
    registers) is pinned to FP registers via asm register variables and an
    operation with no Advanced SIMD form (an integer vector divide or modulo)
is
    scalarised by vector lowering.  The scalar pieces read non-lowpart scalar
    subregs of the OImode register, e.g. (subreg:DI (reg:OI v2) 8), the high 64
    bits of the first Q register.

    Such a subreg is not representable as a hard register (subreg_get_info
    returns representable_p == false), but the hard-register branch of
    simplify_operand_subreg only called alter_subreg, which resolves it to the
    wrong part of the register.  For GENERAL_REGS uses, curr_insn_transform
then
    tried to reload the whole OImode inner register into GENERAL_REGS, which is
    impossible (aarch64_hard_regno_mode_ok is false for OImode in GENERAL_REGS)
    and gave the ICE; for FP-context uses the bad subreg survived to final and
    silently read the wrong bytes (a latent wrong-code bug).

    Handle this in simplify_operand_subreg: when a narrowing subreg of a hard
    register is not representable, reload the inner register through memory
    (NO_REGS) so that the correct bytes are accessed, mirroring the existing
    handling for pseudos.  The frame, arg and stack pointers are left alone, as
    simplify_subreg_regno can reject them merely because reload is not
finished.
    This only affects the already non-representable case; representable subregs
    are unchanged.

    Bootstrapped and tested on aarch64-none-linux-gnu and x86_64-linux.

    Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>

    gcc/ChangeLog:

            PR target/105116
            * lra-constraints.cc (simplify_operand_subreg): Reload a
            non-representable narrowing subreg of a hard register through
            memory instead of resolving it lossily.

    gcc/testsuite/ChangeLog:

            PR target/105116
            * gcc.target/aarch64/sve/pr105116.c: New test.
            * gcc.target/aarch64/sve/pr105116-run.c: New test.

    (cherry picked from commit d00acdc3ecff20ce0591103364be86505c382af6)