[Bug target/123780] gcc miscompiles rvv intrinsics at -O0/1/2/3

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123780

--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Robin Dapp <rdapp@gcc.gnu.org>:

https://gcc.gnu.org/g:7edd9284a6a981cfff95b3d1822f4c029ec78271

commit r16-7007-g7edd9284a6a981cfff95b3d1822f4c029ec78271
Author: Robin Dapp <rdapp@oss.qualcomm.com>
Date:   Fri Jan 23 15:12:45 2026 +0100

    RISC-V: Fix indexed store output template [PR123780].

    This one slipped through when bulk-changing the gather/scatter patterns.

    Regtested on rv64gcv_zvl512b.  Going to commit as obvious.

            PR target/123780

    gcc/ChangeLog:

            * config/riscv/vector.md: Correct output template.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/base/pr123780.c: New test.

    Signed-off-by: Robin Dapp <rdapp@oss.qualcomm.com>