[Bug target/123521] [14/15/16 Regression] LoongArch64: ICE at -O1/O2/O3 during RTL pass: expand

chenglulu at loongson dot cn gcc-bugzilla@gcc.gnu.org
Fri Jan 16 02:46:21 GMT 2026

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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123521

--- Comment #6 from chenglulu <chenglulu at loongson dot cn> ---
Fixed.

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