[Bug target/123364] [13/14/15/16 Regression] ICE with 2 input operands with constraints of "0" where 0 constraint is "=t"

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123364

--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Though, only because the new asmcons pass forces the hard regs in the two "0"
operands into pseudo (the same one).
With e.g.
void
foo (float b)
{
  __asm__ volatile ("" : "=t" (b): "0" (b + 1), "0" (b + 1));
}
it has been ICEing far longer (e.g. in GCC 3.4.6).